Lines Matching refs:si_gci_set_functionsel
784 si_gci_set_functionsel(sih, CC4335_PIN_GPIO_09, 3);
785 si_gci_set_functionsel(sih, CC4335_PIN_GPIO_10, 3);
807 si_gci_set_functionsel(sih, uart_rx, CC4335_FNSEL_UART);
808 si_gci_set_functionsel(sih, uart_tx, CC4335_FNSEL_UART);
833 si_gci_set_functionsel(sih, hostwake, CC4335_FNSEL_MISC1);
863 si_gci_set_functionsel(sih, uart_rx, CC4350C_FNSEL_UART);
864 si_gci_set_functionsel(sih, uart_tx, CC4350C_FNSEL_UART);
867 si_gci_set_functionsel(sih, uart_rx, CC4350_FNSEL_UART);
868 si_gci_set_functionsel(sih, uart_tx, CC4350_FNSEL_UART);
890 si_gci_set_functionsel(sih, hostwake, CC4350_FNSEL_MISC1);
1007 si_gci_set_functionsel(sih, gpio, CC4345_FNSEL_SAMEASPIN);
1110 si_gci_set_functionsel(sih, 1, CC4345_FNSEL_GCI0);
1360 si_gci_set_functionsel(sih, CC4335_PIN_GPIO_04, CC4335_FNSEL_GCI0);
1361 si_gci_set_functionsel(sih, CC4335_PIN_GPIO_05, CC4335_FNSEL_GCI0);
1457 si_gci_set_functionsel(sih, fsync_gpio, CC4350_FNSEL_GCI);
1458 si_gci_set_functionsel(sih, lterx_gpio, CC4350_FNSEL_GCI);
1459 si_gci_set_functionsel(sih, ltetx_gpio, CC4350_FNSEL_GCI);
1460 si_gci_set_functionsel(sih, wlprio_gpio, CC4350_FNSEL_GCI);
1533 si_gci_set_functionsel(sih, uartin, fnselin);
1534 si_gci_set_functionsel(sih, uartout, fnselout);
1735 si_gci_set_functionsel(si_t *sih, uint32 pin, uint8 fnsel)
1739 SI_MSG(("si_gci_set_functionsel:%d\n", pin));
1766 si_gci_set_functionsel(sih, i, CC4335_FNSEL_IND);
2233 si_gci_set_functionsel(sih, CC4350_PIN_GPIO_13, CC4350_FNSEL_SAMEASPIN);
2234 si_gci_set_functionsel(sih, CC4350_PIN_GPIO_14, CC4350_FNSEL_SAMEASPIN);
2235 si_gci_set_functionsel(sih, CC4350_PIN_GPIO_15, CC4350_FNSEL_SAMEASPIN);