Lines Matching defs:pmu_var
4111 pmu_reg_t *pmu_var = (pmu_reg_t*)arg;
4112 pmu_var->pmu_control = si_ccreg(sih, PMU_CTL, 0, 0);
4113 pmu_var->pmu_capabilities = si_ccreg(sih, PMU_CAP, 0, 0);
4114 pmu_var->pmu_status = si_ccreg(sih, PMU_ST, 0, 0);
4115 pmu_var->res_state = si_ccreg(sih, PMU_RES_STATE, 0, 0);
4116 pmu_var->res_pending = si_ccreg(sih, PMU_RES_PENDING, 0, 0);
4117 pmu_var->pmu_timer1 = si_ccreg(sih, PMU_TIMER, 0, 0);
4118 pmu_var->min_res_mask = si_ccreg(sih, MINRESMASKREG, 0, 0);
4119 pmu_var->max_res_mask = si_ccreg(sih, MAXRESMASKREG, 0, 0);
4120 pmu_chip_ctl_reg = (pmu_var->pmu_capabilities & 0xf8000000);
4123 pmu_var->pmu_chipcontrol1[i] = si_pmu_chipcontrol(sih, i, 0, 0);
4125 pmu_chip_reg_reg = (pmu_var->pmu_capabilities & 0x07c00000);
4128 pmu_var->pmu_regcontrol[i] = si_pmu_regcontrol(sih, i, 0, 0);
4130 pmu_chip_pll_reg = (pmu_var->pmu_capabilities & 0x003e0000);
4133 pmu_var->pmu_pllcontrol[i] = si_pmu_pllcontrol(sih, i, 0, 0);
4135 pmu_chip_res_reg = (pmu_var->pmu_capabilities & 0x00001f00);
4139 pmu_var->pmu_rsrc_up_down_timer[i] = si_corereg(sih, SI_CC_IDX,
4142 pmu_chip_res_reg = (pmu_var->pmu_capabilities & 0x00001f00);
4146 pmu_var->rsrc_dep_mask[i] = si_corereg(sih, SI_CC_IDX, PMU_RES_DEP_MASK, 0, 0);