Lines Matching refs:lw
129 1: lw v1,(SBCONFIGOFF + SBIDHIGH)(a0)
182 lw t1,CC_CHIPID(t0) # Get chipid
195 lw t1,0(a2)
206 lw t1,0(a2)
212 lw t1,0(a2)
223 lw t0,8(a2) # SDRAM init
225 lw t2,12(a2)
228 lw t3,16(a2) # SDRAM ncdl
291 lw dll,MEMC_NCDLCTL(a0)
578 lw t0, MEMC_PRIORINV(a0)
585 lw t1,(SBCONFIGOFF + SBIDHIGH)(t0)
590 lw t1,CC_CHIPID(t0) # is this BCM4785 chip?
594 lw t0,MEMC_PRIORINV(a0) # change PriorInvTim to 2
600 lw t0,(SBCONFIGOFF + SBIDHIGH)(a0)
610 lw t1,SR_COREINFO(a0)
653 lw t5,0(a1)
657 lw t5,4(a1)
667 lw t5,0(a1)
671 lw t5,4(a1)
681 lw t5,0(a1)
685 lw t5,4(a1)
698 lw t5,0(a1)
702 lw t5,4(a1)
712 lw t5,0(a1)
716 lw t5,4(a1)
763 lw a1,CC_CHIPID(t8) # Get chipid
768 lw a2,SBIDHIGH(t8)
783 lw a2,CC_CHIPID(t8)
863 lw a1,MEMC_CONTROL(a0)
864 lw a1,MEMC_CONTROL(a0)
865 lw a1,MEMC_CONTROL(a0)
869 lw a1,MEMC_CONTROL(a0)
870 lw a1,MEMC_CONTROL(a0)
871 lw a1,MEMC_CONTROL(a0)
890 1: lw a1,(SBCONFIGOFF + SBIDLOW)(a0)
891 lw a1,(SBCONFIGOFF + SBIDHIGH)(a0)
986 lw a1,MEMC_CONTROL(a0)
987 lw a1,MEMC_CONTROL(a0)
988 lw a1,MEMC_CONTROL(a0)
992 lw a1,MEMC_CONTROL(a0)
993 lw a1,MEMC_CONTROL(a0)
994 lw a1,MEMC_CONTROL(a0)
998 lw a1,MEMC_CONTROL(a0)
999 lw a1,MEMC_CONTROL(a0)
1000 lw a1,MEMC_CONTROL(a0)
1016 1: lw a1,(SBCONFIGOFF + SBIDLOW)(a0)
1017 lw a1,(SBCONFIGOFF + SBIDHIGH)(a0)
1071 lw t8,(SBCONFIGOFF + SBTMSTATELOW)(a0)
1072 lw t8,(SBCONFIGOFF + SBTMSTATELOW)(a0)
1073 lw t8,(SBCONFIGOFF + SBTMSTATELOW)(a0)
1080 lw t8,(SBCONFIGOFF + SBTMSTATELOW)(a0)
1081 lw t8,(SBCONFIGOFF + SBTMSTATELOW)(a0)
1082 lw t8,(SBCONFIGOFF + SBTMSTATELOW)(a0)
1089 lw t8,(SBCONFIGOFF + SBTMSTATELOW)(a0)
1090 lw t8,(SBCONFIGOFF + SBTMSTATELOW)(a0)
1091 lw t8,(SBCONFIGOFF + SBTMSTATELOW)(a0)