Lines Matching refs:nfl
87 static int nandcore_read(hndnand_t *nfl, uint64 offset, uint len, uchar *buf);
88 static int nandcore_write(hndnand_t *nfl, uint64 offset, uint len, const uchar *buf);
89 static int nandcore_erase(hndnand_t *nfl, uint64 offset);
90 static int nandcore_checkbadb(hndnand_t *nfl, uint64 offset);
91 static int nandcore_mark_badb(hndnand_t *nfl, uint64 offset);
94 static int nandcore_dev_ready(hndnand_t *nfl);
95 static int nandcore_select_chip(hndnand_t *nfl, int chip);
96 static int nandcore_cmdfunc(hndnand_t *nfl, uint64 addr, int cmd);
97 static int nandcore_waitfunc(hndnand_t *nfl, int *status);
98 static int nandcore_read_oob(hndnand_t *nfl, uint64 addr, uint8 *oob);
99 static int nandcore_write_oob(hndnand_t *nfl, uint64 addr, uint8 *oob);
100 static int nandcore_read_page(hndnand_t *nfl, uint64 addr, uint8 *buf, uint8 *oob, bool ecc,
102 static int nandcore_write_page(hndnand_t *nfl, uint64 addr, const uint8 *buf, uint8 *oob, bool ecc);
103 static int nandcore_cmd_read_byte(hndnand_t *nfl, int cmd, int arg);
128 _nandcore_oobbyte_per_cache(hndnand_t *nfl, uint cache, uint32 spare)
132 if (nfl->sectorsize == 512)
147 _nandcore_read_page(hndnand_t *nfl, uint64 offset, uint8 *buf, uint8 *oob, bool ecc,
151 nandregs_t *nc = (nandregs_t *)nfl->core;
152 aidmp_t *ai = (aidmp_t *)nfl->wrap;
161 ASSERT(nfl->sih);
163 mask = nfl->pagesize - 1;
168 if ((((offset + nfl->pagesize) >> 20) > nfl->size) ||
169 ((((offset + nfl->pagesize) >> 20) == nfl->size) &&
170 (((offset + nfl->pagesize) & ((1 << 20) - 1)) != 0)))
173 osh = si_osh(nfl->sih);
181 OR_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0,
184 AND_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0,
201 if ((ret = nandcore_poll(nfl->sih, nc)) < 0)
214 rd_oob_byte = _nandcore_oobbyte_per_cache(nfl, cache, spare_per_cache);
260 _nandcore_write_page(hndnand_t *nfl, uint64 offset, const uint8 *buf, uint8 *oob, bool ecc)
263 nandregs_t *nc = (nandregs_t *)nfl->core;
264 aidmp_t *ai = (aidmp_t *)nfl->wrap;
271 ASSERT(nfl->sih);
273 mask = nfl->pagesize - 1;
278 if ((((offset + nfl->pagesize) >> 20) > nfl->size) ||
279 ((((offset + nfl->pagesize) >> 20) == nfl->size) &&
280 (((offset + nfl->pagesize) & ((1 << 20) - 1)) != 0)))
283 osh = si_osh(nfl->sih);
290 OR_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0,
293 AND_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0,
317 wr_oob_byte = _nandcore_oobbyte_per_cache(nfl, cache, spare_per_cache);
357 ret = nandcore_poll(nfl->sih, nc);
416 nandcore_override_config(hndnand_t *nfl)
418 nandregs_t *nc = nfl->core;
422 ASSERT(nfl->sih);
423 osh = si_osh(nfl->sih);
426 if ((nfl->id[0] == 0xec) && (nfl->id[1] == 0xde) &&
427 (nfl->id[2] == 0xd5) && (nfl->id[3] == 0x7e) &&
428 (nfl->id[4] == 0x68) && (nfl->id[5] == 0x44)) {
448 if ((nfl->id[0] == 0x2c) && (nfl->id[1] == 0x64) &&
449 (nfl->id[2] == 0x44) && (nfl->id[3] == 0x4b) &&
450 (nfl->id[4] == 0xa9)) {
463 nandcore_optimize_timing(hndnand_t *nfl)
465 nandregs_t *nc = nfl->core;
471 ASSERT(nfl->sih);
472 osh = si_osh(nfl->sih);
475 if (memcmp(nfl->id, info->id, 5) == 0)
482 reg = R_REG(osh, nfl->chipidx ? &nc->timing_2_cs1 : &nc->timing_2_cs0);
500 W_REG(osh, nfl->chipidx ? &nc->timing_1_cs1 : &nc->timing_1_cs0, reg);
511 W_REG(osh, nfl->chipidx ? &nc->timing_2_cs1 : &nc->timing_2_cs0, reg);
740 nandcore_read(hndnand_t *nfl, uint64 offset, uint len, uchar *buf)
747 ASSERT(nfl->sih);
748 osh = si_osh(nfl->sih);
754 _nandcore_read_page(nfl, offset, to, NULL, TRUE, &herr, &serr);
756 res -= nfl->pagesize;
757 offset += nfl->pagesize;
758 to += nfl->pagesize;
790 nandcore_write(hndnand_t *nfl, uint64 offset, uint len, const uchar *buf)
797 ASSERT(nfl->sih);
798 osh = si_osh(nfl->sih);
804 ret = _nandcore_write_page(nfl, offset, from, NULL, TRUE);
808 res -= nfl->pagesize;
809 offset += nfl->pagesize;
810 from += nfl->pagesize;
823 nandcore_erase(hndnand_t *nfl, uint64 offset)
825 si_t *sih = nfl->sih;
826 nandregs_t *nc = (nandregs_t *)nfl->core;
835 if ((offset >> 20) >= nfl->size)
837 if ((offset & (nfl->blocksize - 1)) != 0) {
871 nandcore_checkbadb(hndnand_t *nfl, uint64 offset)
873 si_t *sih = nfl->sih;
874 nandregs_t *nc = (nandregs_t *)nfl->core;
875 aidmp_t *ai = (aidmp_t *)nfl->wrap;
887 if ((offset >> 20) >= nfl->size)
889 if ((offset & (nfl->blocksize - 1)) != 0) {
894 OR_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0,
899 addr = offset + (nfl->pagesize * i);
923 rd_oob_byte = _nandcore_oobbyte_per_cache(nfl, cache, spare_per_cache);
955 nandcore_mark_badb(hndnand_t *nfl, uint64 offset)
957 si_t *sih = nfl->sih;
958 nandregs_t *nc = (nandregs_t *)nfl->core;
959 aidmp_t *ai = (aidmp_t *)nfl->wrap;
968 if ((offset >> 20) >= nfl->size)
970 if ((offset & (nfl->blocksize - 1)) != 0) {
999 off = offset + (nfl->pagesize * i);
1056 _nandcore_set_cmd_address(hndnand_t *nfl, uint64 addr)
1060 si_t *sih = nfl->sih;
1061 nandregs_t *nc = (nandregs_t *)nfl->core;
1072 nandcore_dev_ready(hndnand_t *nfl)
1074 aidmp_t *ai = (aidmp_t *)nfl->wrap;
1076 ASSERT(nfl->sih);
1078 return (R_REG(si_osh(nfl->sih), &ai->iostatus) & NAND_RO_CTRL_READY);
1082 nandcore_select_chip(hndnand_t *nfl, int chip)
1086 si_t *sih = nfl->sih;
1087 nandregs_t *nc = (nandregs_t *)nfl->core;
1098 nfl->chipidx = chip;
1104 nandcore_cmdfunc(hndnand_t *nfl, uint64 addr, int cmd)
1108 nandregs_t *nc = (nandregs_t *)nfl->core;
1110 ASSERT(nfl->sih);
1111 osh = si_osh(nfl->sih);
1115 _nandcore_set_cmd_address(nfl, addr);
1121 ret = nandcore_waitfunc(nfl, NULL);
1126 _nandcore_set_cmd_address(nfl, addr);
1129 _nandcore_set_cmd_address(nfl, addr);
1131 ret = nandcore_waitfunc(nfl, NULL);
1135 ret = nandcore_waitfunc(nfl, NULL);
1139 ret = nandcore_waitfunc(nfl, NULL);
1145 ret = nandcore_waitfunc(nfl, NULL);
1164 nandcore_waitfunc(hndnand_t *nfl, int *status)
1168 nandregs_t *nc = (nandregs_t *)nfl->core;
1170 ASSERT(nfl->sih);
1171 osh = si_osh(nfl->sih);
1173 ret = nandcore_poll(nfl->sih, nc);
1181 nandcore_read_oob(hndnand_t *nfl, uint64 addr, uint8 *oob)
1184 si_t *sih = nfl->sih;
1185 nandregs_t *nc = (nandregs_t *)nfl->core;
1186 aidmp_t *ai = (aidmp_t *)nfl->wrap;
1197 OR_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0,
1220 rd_oob_byte = _nandcore_oobbyte_per_cache(nfl, cache, spare_per_cache);
1245 nandcore_write_oob(hndnand_t *nfl, uint64 addr, uint8 *oob)
1248 si_t *sih = nfl->sih;
1249 nandregs_t *nc = (nandregs_t *)nfl->core;
1250 aidmp_t *ai = (aidmp_t *)nfl->wrap;
1268 reg = R_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0);
1269 if (nfl->sectorsize == 512) {
1274 W_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0, reg);
1294 wr_oob_byte = _nandcore_oobbyte_per_cache(nfl, cache, spare_per_cache);
1333 reg = R_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0);
1334 if (nfl->sectorsize == 512) {
1339 W_REG(osh, nfl->chipidx ? &nc->acc_control_cs1 : &nc->acc_control_cs0, reg);
1348 nandcore_read_page(hndnand_t *nfl, uint64 addr, uint8 *buf, uint8 *oob, bool ecc,
1351 return _nandcore_read_page(nfl, addr, buf, oob, ecc, herr, serr);
1355 nandcore_write_page(hndnand_t *nfl, uint64 addr, const uint8 *buf, uint8 *oob, bool ecc)
1357 return _nandcore_write_page(nfl, addr, buf, oob, ecc);
1361 nandcore_cmd_read_byte(hndnand_t *nfl, int cmd, int arg)
1365 nandregs_t *nc = (nandregs_t *)nfl->core;
1367 ASSERT(nfl->sih);
1368 osh = si_osh(nfl->sih);