Lines Matching refs:SI_CC_IDX
139 pmu_corereg(sih, SI_CC_IDX, chipcontrol_addr, ~0, reg);
140 return pmu_corereg(sih, SI_CC_IDX, chipcontrol_data, mask, val);
147 pmu_corereg(sih, SI_CC_IDX, regcontrol_addr, ~0, reg);
148 return pmu_corereg(sih, SI_CC_IDX, regcontrol_data, mask, val);
155 pmu_corereg(sih, SI_CC_IDX, pllcontrol_addr, ~0, reg);
156 return pmu_corereg(sih, SI_CC_IDX, pllcontrol_data, mask, val);
173 pmu_corereg(sih, SI_CC_IDX, pmucontrol,
329 cc = si_setcoreidx(sih, SI_CC_IDX);
718 pmu_corereg(sih, SI_CC_IDX, regcontrol_addr, /* PMU VREG register */
720 pmu_corereg(sih, SI_CC_IDX, regcontrol_data,
748 pmu_corereg(sih, SI_CC_IDX, min_res_mask,
773 cc = si_setcoreidx(sih, SI_CC_IDX);
2427 min_mask = pmu_corereg(sih, SI_CC_IDX, min_res_mask, 0, 0);
2433 min_mask = pmu_corereg(sih, SI_CC_IDX, min_res_mask, 0, 0);
2495 min_mask = pmu_corereg(sih, SI_CC_IDX,
2522 min_mask = pmu_corereg(sih, SI_CC_IDX, min_res_mask, 0, 0);
2695 cc = si_setcoreidx(sih, SI_CC_IDX);
4449 cc = si_setcoreidx(sih, SI_CC_IDX);
5699 cc = si_setcoreidx(sih, SI_CC_IDX);
5851 cc = si_setcoreidx(sih, SI_CC_IDX);
6004 cc = si_setcoreidx(sih, SI_CC_IDX);
6211 cc = si_setcoreidx(sih, SI_CC_IDX);
6388 cc = si_setcoreidx(sih, SI_CC_IDX);
6464 cc = si_setcoreidx(sih, SI_CC_IDX);
6867 cc = si_setcoreidx(sih, SI_CC_IDX);
6998 cc = si_setcoreidx(sih, SI_CC_IDX);
7866 cc = si_setcoreidx(sih, SI_CC_IDX);
8131 si_corereg(sih, SI_CC_IDX, OFFSETOF(chipcregs_t, clk_ctl_st), CCS_FORCEALP, CCS_FORCEALP);
8280 cc = si_setcoreidx(sih, SI_CC_IDX);
8465 pmu_corereg(sih, SI_CC_IDX, regcontrol_addr,
8467 pmu_corereg(sih, SI_CC_IDX, regcontrol_data,
8560 pmu_corereg(sih, SI_CC_IDX, min_res_mask,
8714 cc = si_setcoreidx(sih, SI_CC_IDX);