Lines Matching refs:sll
436 sll t1,t1,1
618 sll t0,t0,9
746 sll t1,t0,8
755 sll t1,t0,4
763 sll t1,8
768 sll t1,8
785 1: sll t0,t0,1 # * 2
788 sll t1,t1,8
791 sll t0,t0,16
895 sll t0,t1,16
902 sll t0,t1,1
906 sll t0,t0,15
915 sll t0,t1,16
922 sll t0,t1,1
926 sll t0,t0,15
1013 sll t1,2 # Reg num * 4 is reg offset
1031 sll t8,20
1040 sll t8,28
1216 sll t1, 16
1219 sll t1, 20
1331 sll t2, t1, 1
1417 sll t1, t1, 3 # Shift to bit6:4 for DDR MRS register