Lines Matching refs:sdram_config
212 * s0 = sdram_config + sdram_refresh values
375 /* Read sdram_config from nvram */
484 /* sdram_config is a 16bit value 12 bytes inside the nvram hdr.
503 lw s0,12(t4) # Pick up sdram_config & sdram_refresh
1308 /* Check if sdram_config is nonzero */
1313 /* sdram_config is 0, configure by code-default values */
1326 * sdram_config[2:0]: CAS latency
1340 * sdram_config[10:8]: 0=2048; 1=1024; 2=512; 3=256 columns
1345 srl t1, s0, 8 # Column fields from sdram_config s0(bit10:8)
1363 * sdram_config[7]: 0 default bus width, 1: reduced width
1372 * sdram_config[6]: 0 for 4 banks, 1 for 8 banks