Lines Matching refs:lw
231 lw a0,CC_EROMPTR(s2)
238 lw t0,0(t0)
241 lw t3,0(t3)
243 lw t0,0(a0) # t0 = CIA
244 lw t3,4(a0) # t3 = CIB
298 lw a1,0(a1)
300 lw a1,8(a0)
311 lw t0,0(t0)
313 lw t0,0(a0)
359 lw t0,DMEMC_STAT(a1)
367 lw t0,CC_CHIPST(s2)
389 lw t5,CC_CHIPST(s2)
419 lw t5,0(t4)
432 lw t5,0(t4)
446 lw t5,0(t4)
452 lw t5,0(t4)
503 lw s0,12(t4) # Pick up sdram_config & sdram_refresh
507 lw s8,16(t4) # Pick up sdram_ncdl
555 lw t1,DMEMC_DDR_CTRL(a1)
610 lw t1,DMEMC_CONTROL140(a1)
619 lw t1,DMEMC_CONTROL141(a1)
627 lw t1,DMEMC_CONTROL142(a1)
636 lw t1,DMEMC_CONTROL143(a1)
656 lw t0,8(t4) # Pick up sdram_init value for TREF
657 lw t2,DMEMC_CONTROL29(a1)
696 lw t0,DMEMC_CONTROL08(a1)
710 lw t0,DMEMC_CONTROL05(a1)
715 lw t0,DMEMC_CONTROL19(a1)
720 lw t0,DMEMC_CONTROL24(a1)
727 lw t0,DMEMC_CONTROL34(a1)
751 1: lw t2,DMEMC_CONTROL128(a1)
756 lw t2,DMEMC_CONTROL137(a1)
764 lw t2,DMEMC_CONTROL130(a1)
769 lw t2,DMEMC_CONTROL15(a1)
775 lw t2,DMEMC_CONTROL16(a1)
827 3: lw t0,DMEMC_CONTROL28(a1)
832 4: lw t0,DMEMC_CONTROL29(a1)
839 lw t0,DMEMC_CONTROL05(a1)
850 lw t0,DMEMC_CONTROL140(a1)
855 lw t0,DMEMC_CONTROL141(a1)
870 lw t0,DMEMC_CONTROL09(a1) # Read current control09 reg
880 1: lw t0,DMEMC_CONTROL133(a1) # Poll for INT_INIT_DONE (dmemc >=2)
885 lw t0,DMEMC_CONTROL05(a1)
890 lw t1,DMEMC_CONTROL144(a1)
892 lw t2,DMEMC_CONTROL140(a1)
899 lw t2,DMEMC_CONTROL142(a1)
910 lw t1,DMEMC_CONTROL145(a1)
912 lw t2,DMEMC_CONTROL141(a1)
919 lw t2,DMEMC_CONTROL143(a1)
933 lw t2,DMEMC_CONTROL132(a1)
941 2: lw t0,DMEMC_CONTROL24(a1) # Poll for INT_INIT_DONE (dmems & dmemc<2)
948 lw t2,DMEMC_CONTROL23(a1)
966 lw t8,AI_RESETCTRL(a2)
967 lw t8,AI_RESETCTRL(a2)
968 lw t8,AI_RESETCTRL(a2)
975 lw t8,AI_RESETCTRL(a2)
976 lw t8,AI_RESETCTRL(a2)
977 lw t8,AI_RESETCTRL(a2)
984 lw t9,AI_IOCTRL(a2)
985 lw t9,AI_IOCTRL(a2)
986 lw t9,AI_IOCTRL(a2)
1006 1: lw t1,0(a0) # Pick up reg num
1012 lw t2,4(a0) # Get reg value
1029 lw t9,CC_NAND_CONFIG(s2)
1037 lw v1,0(t8)
1046 lw v0,0(t8)
1062 1: lw t8,CC_NAND_INTFC_STATUS(s2)
1068 lw t9,CC_NAND_CMD_ADDR(s2) # read back
1071 lw t9,CC_NAND_CMD_START(s2) # read back
1076 1: lw t8,CC_NAND_INTFC_STATUS(s2)
1086 lw t9,CC_NAND_SPARE_RD_0(s2)
1135 lw t7, DDR23PHY_ZQ_PVT_COMP_CTL(t0)
1139 lw t1, DDR23PHY_ZQ_PVT_COMP_CTL(t0)
1148 lw t1, DDR23PHY_ZQ_PVT_COMP_CTL(t0)
1172 lw t1, DDR23PHY_PLL_STATUS(t0)
1194 lw t1, DDR23PHY_BL3_VDL_STATUS(t0)
1198 lw t1, DDR23PHY_BL2_VDL_STATUS(t0)
1202 lw t1, DDR23PHY_BL1_VDL_STATUS(t0)
1206 lw t1, DDR23PHY_BL0_VDL_STATUS(t0)
1212 lw t1, DDR23PHY_BL0_VDL_STATUS(t0)
1337 lw t2, PL341_memory_cfg(a1) # Read PL341_memory_cfg
1354 lw t2, PL341_memory_cfg2(a1) # Read PL341_memory_cfg2
1413 lw t1, PL341_cas_latency(a1) # CAS value in bit3:1