soc/fsl/mpc5200_psc_ac97.c

32 static struct psc_dma *psc_dma;
39 	mutex_lock(&psc_dma->mutex);
42 	status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
46 		mutex_unlock(&psc_dma->mutex);
51 	in_be32(&psc_dma->psc_regs->ac97_data);
54 	out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
57 	status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
61 				in_be16(&psc_dma->psc_regs->sr_csr.status));
62 		mutex_unlock(&psc_dma->mutex);
66 	val = in_be32(&psc_dma->psc_regs->ac97_data);
69 		mutex_unlock(&psc_dma->mutex);
74 	mutex_unlock(&psc_dma->mutex);
83 	mutex_lock(&psc_dma->mutex);
86 	status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
93 	out_be32(&psc_dma->psc_regs->ac97_cmd,
97 	mutex_unlock(&psc_dma->mutex);
102 	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
104 	mutex_lock(&psc_dma->mutex);
106 	out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
108 	out_be32(&regs->sicr, psc_dma->sicr);
110 	mutex_unlock(&psc_dma->mutex);
115 	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
117 	mutex_lock(&psc_dma->mutex);
118 	dev_dbg(psc_dma->dev, "cold reset\n");
120 	mpc5200_psc_ac97_gpio_reset(psc_dma->id);
123 	out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB);
128 	mutex_unlock(&psc_dma->mutex);
146 	struct psc_dma *psc_dma = cpu_dai->private_data;
147 	struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
149 	dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
169 	struct psc_dma *psc_dma = cpu_dai->private_data;
171 	dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream);
174 		out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
176 		out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
185 	struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data;
186 	struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
190 		dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n",
194 		psc_dma->slots |= s->ac97_slot_bits;
195 		out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
199 		dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n",
203 		psc_dma->slots &= ~(s->ac97_slot_bits);
204 		out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
213 	struct psc_dma *psc_dma = cpu_dai->private_data;
214 	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
300 	psc_dma = dev_get_drvdata(&op->dev);
301 	regs = psc_dma->psc_regs;
302 	ac97.private_data = psc_dma;
305 		psc_ac97_dai[i].private_data = psc_dma;
307 	psc_dma->imr = 0;
308 	out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
311 	psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
312 	out_be32(&regs->sicr, psc_dma->sicr);