Lines Matching refs:control_register
449 u32 control_register; /* cached value */
753 1 << ((hdspm_decode_latency(hdspm->control_register) + 8));
782 s->control_register |= (HDSPM_AudioInterruptEnable | HDSPM_Start);
783 hdspm_write(s, HDSPM_controlRegister, s->control_register);
788 s->control_register &= ~(HDSPM_Start | HDSPM_AudioInterruptEnable);
789 hdspm_write(s, HDSPM_controlRegister, s->control_register);
820 s->control_register &= ~HDSPM_LatencyMask;
821 s->control_register |= hdspm_encode_latency(n);
823 hdspm_write(s, HDSPM_controlRegister, s->control_register);
865 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) {
971 hdspm->control_register &= ~HDSPM_FrequencyMask;
972 hdspm->control_register |= rate_bits;
973 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1131 hmidi->hdspm->control_register |= HDSPM_Midi1InterruptEnable;
1133 hmidi->hdspm->control_register |= HDSPM_Midi0InterruptEnable;
1135 hmidi->hdspm->control_register);
1154 if (!(hdspm->control_register & ie)) {
1156 hdspm->control_register |= ie;
1159 hdspm->control_register &= ~ie;
1162 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1440 if (hdspm->control_register & HDSPM_ClockModeMaster)
1482 if (hdspm->control_register & HDSPM_ClockModeMaster) {
1517 hdspm->control_register &= ~HDSPM_ClockModeMaster;
1519 hdspm->control_register);
1554 hdspm->control_register |= HDSPM_ClockModeMaster;
1555 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1633 switch (hdspm->control_register & HDSPM_SyncRefMask) {
1647 switch (hdspm->control_register & HDSPM_SyncRefMask) {
1660 hdspm->control_register &= ~HDSPM_SyncRefMask;
1665 hdspm->control_register |= 0;
1668 hdspm->control_register |= HDSPM_SyncRef0;
1671 hdspm->control_register |= HDSPM_SyncRef1;
1674 hdspm->control_register |= HDSPM_SyncRef1+HDSPM_SyncRef0;
1677 hdspm->control_register |= HDSPM_SyncRef2;
1680 hdspm->control_register |= HDSPM_SyncRef2+HDSPM_SyncRef0;
1683 hdspm->control_register |= HDSPM_SyncRef2+HDSPM_SyncRef1;
1686 hdspm->control_register |=
1690 hdspm->control_register |= HDSPM_SyncRef3;
1698 hdspm->control_register |= HDSPM_SyncRef_MADI;
1701 hdspm->control_register |= HDSPM_SyncRef_Word;
1707 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1872 return (hdspm->control_register & HDSPM_LineOut) ? 1 : 0;
1879 hdspm->control_register |= HDSPM_LineOut;
1881 hdspm->control_register &= ~HDSPM_LineOut;
1882 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1928 return (hdspm->control_register & HDSPM_TX_64ch) ? 1 : 0;
1934 hdspm->control_register |= HDSPM_TX_64ch;
1936 hdspm->control_register &= ~HDSPM_TX_64ch;
1937 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1983 return (hdspm->control_register & HDSPM_clr_tms) ? 1 : 0;
1989 hdspm->control_register |= HDSPM_clr_tms;
1991 hdspm->control_register &= ~HDSPM_clr_tms;
1992 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2038 return (hdspm->control_register & HDSPM_AutoInp) ? 1 : 0;
2044 hdspm->control_register |= HDSPM_AutoInp;
2046 hdspm->control_register &= ~HDSPM_AutoInp;
2047 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2093 return (hdspm->control_register & HDSPM_Emphasis) ? 1 : 0;
2099 hdspm->control_register |= HDSPM_Emphasis;
2101 hdspm->control_register &= ~HDSPM_Emphasis;
2102 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2148 return (hdspm->control_register & HDSPM_Dolby) ? 1 : 0;
2154 hdspm->control_register |= HDSPM_Dolby;
2156 hdspm->control_register &= ~HDSPM_Dolby;
2157 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2203 return (hdspm->control_register & HDSPM_Professional) ? 1 : 0;
2209 hdspm->control_register |= HDSPM_Professional;
2211 hdspm->control_register &= ~HDSPM_Professional;
2212 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2258 return (hdspm->control_register & HDSPM_InputSelect0) ? 1 : 0;
2264 hdspm->control_register |= HDSPM_InputSelect0;
2266 hdspm->control_register &= ~HDSPM_InputSelect0;
2267 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2329 return (hdspm->control_register & HDSPM_DS_DoubleWire) ? 1 : 0;
2335 hdspm->control_register |= HDSPM_DS_DoubleWire;
2337 hdspm->control_register &= ~HDSPM_DS_DoubleWire;
2338 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2400 if (hdspm->control_register & HDSPM_QS_DoubleWire)
2402 if (hdspm->control_register & HDSPM_QS_QuadWire)
2409 hdspm->control_register &= ~(HDSPM_QS_DoubleWire | HDSPM_QS_QuadWire);
2414 hdspm->control_register |= HDSPM_QS_DoubleWire;
2417 hdspm->control_register |= HDSPM_QS_QuadWire;
2420 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
2996 hdspm->control_register, hdspm->control2_register,
3001 x = 1 << (6 + hdspm_decode_latency(hdspm->control_register &
3009 (hdspm->control_register & HDSPM_LineOut) ? "on " : "off",
3012 switch (hdspm->control_register & HDSPM_InputMask) {
3023 switch (hdspm->control_register & HDSPM_SyncRefMask) {
3040 control_register & HDSPM_clr_tms) ? "on" : "off",
3042 control_register & HDSPM_TX_64ch) ? "64" : "56",
3044 control_register & HDSPM_AutoInp) ? "on" : "off");
3072 if (!(hdspm->control_register & HDSPM_ClockModeMaster))
3188 hdspm->control_register,
3193 x = 1 << (6 + hdspm_decode_latency(hdspm->control_register &
3202 control_register & HDSPM_LineOut) ? "on " : "off",
3208 control_register & HDSPM_clr_tms) ? "on" : "off",
3210 control_register & HDSPM_Emphasis) ? "on" : "off",
3212 control_register & HDSPM_Dolby) ? "on" : "off");
3249 if (!(hdspm->control_register & HDSPM_ClockModeMaster))
3266 hdspm->control_register & HDSPM_DS_DoubleWire?
3269 hdspm->control_register & HDSPM_QS_DoubleWire?
3271 hdspm->control_register & HDSPM_QS_QuadWire?
3358 hdspm->control_register =
3367 hdspm->control_register =
3382 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3462 hdspm->control_register &= ~HDSPM_Midi0InterruptEnable;
3464 hdspm->control_register);
3472 hdspm->control_register &= ~HDSPM_Midi1InterruptEnable;
3474 hdspm->control_register);
4453 hdspm->control_register &=
4457 hdspm->control_register);