Lines Matching defs:rme96
202 struct rme96 {
243 #define RME96_ISPLAYING(rme96) ((rme96)->wcreg & RME96_WCR_START)
244 #define RME96_ISRECORDING(rme96) ((rme96)->wcreg & RME96_WCR_START_2)
245 #define RME96_HAS_ANALOG_IN(rme96) ((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST)
246 #define RME96_HAS_ANALOG_OUT(rme96) ((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PRO || \
247 (rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST)
248 #define RME96_DAC_IS_1852(rme96) (RME96_HAS_ANALOG_OUT(rme96) && (rme96)->rev >= 4)
249 #define RME96_DAC_IS_1855(rme96) (((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST && (rme96)->rev < 4) || \
250 ((rme96)->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PRO && (rme96)->rev == 2))
251 #define RME96_185X_MAX_OUT(rme96) ((1 << (RME96_DAC_IS_1852(rme96) ? RME96_AD1852_VOL_BITS : RME96_AD1855_VOL_BITS)) - 1)
274 snd_rme96_proc_init(struct rme96 *rme96);
278 struct rme96 *rme96);
281 snd_rme96_getinputtype(struct rme96 *rme96);
284 snd_rme96_playback_ptr(struct rme96 *rme96)
286 return (readl(rme96->iobase + RME96_IO_GET_PLAY_POS)
287 & RME96_RCR_AUDIO_ADDR_MASK) >> rme96->playback_frlog;
291 snd_rme96_capture_ptr(struct rme96 *rme96)
293 return (readl(rme96->iobase + RME96_IO_GET_REC_POS)
294 & RME96_RCR_AUDIO_ADDR_MASK) >> rme96->capture_frlog;
303 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
304 count <<= rme96->playback_frlog;
305 pos <<= rme96->playback_frlog;
306 memset_io(rme96->iobase + RME96_IO_PLAY_BUFFER + pos,
318 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
319 count <<= rme96->playback_frlog;
320 pos <<= rme96->playback_frlog;
321 copy_from_user_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + pos, src,
333 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
334 count <<= rme96->capture_frlog;
335 pos <<= rme96->capture_frlog;
336 copy_to_user_fromio(dst, rme96->iobase + RME96_IO_REC_BUFFER + pos,
462 snd_rme96_write_SPI(struct rme96 *rme96, u16 val)
468 rme96->areg |= RME96_AR_CDATA;
470 rme96->areg &= ~RME96_AR_CDATA;
472 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH);
473 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
475 rme96->areg |= RME96_AR_CCLK;
476 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
480 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA);
481 rme96->areg |= RME96_AR_CLATCH;
482 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
484 rme96->areg &= ~RME96_AR_CLATCH;
485 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
489 snd_rme96_apply_dac_volume(struct rme96 *rme96)
491 if (RME96_DAC_IS_1852(rme96)) {
492 snd_rme96_write_SPI(rme96, (rme96->vol[0] << 2) | 0x0);
493 snd_rme96_write_SPI(rme96, (rme96->vol[1] << 2) | 0x2);
494 } else if (RME96_DAC_IS_1855(rme96)) {
495 snd_rme96_write_SPI(rme96, (rme96->vol[0] & 0x3FF) | 0x000);
496 snd_rme96_write_SPI(rme96, (rme96->vol[1] & 0x3FF) | 0x400);
501 snd_rme96_reset_dac(struct rme96 *rme96)
503 writel(rme96->wcreg | RME96_WCR_PD,
504 rme96->iobase + RME96_IO_CONTROL_REGISTER);
505 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
509 snd_rme96_getmontracks(struct rme96 *rme96)
511 return ((rme96->wcreg >> RME96_WCR_BITPOS_MONITOR_0) & 1) +
512 (((rme96->wcreg >> RME96_WCR_BITPOS_MONITOR_1) & 1) << 1);
516 snd_rme96_setmontracks(struct rme96 *rme96,
520 rme96->wcreg |= RME96_WCR_MONITOR_0;
522 rme96->wcreg &= ~RME96_WCR_MONITOR_0;
525 rme96->wcreg |= RME96_WCR_MONITOR_1;
527 rme96->wcreg &= ~RME96_WCR_MONITOR_1;
529 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
534 snd_rme96_getattenuation(struct rme96 *rme96)
536 return ((rme96->wcreg >> RME96_WCR_BITPOS_GAIN_0) & 1) +
537 (((rme96->wcreg >> RME96_WCR_BITPOS_GAIN_1) & 1) << 1);
541 snd_rme96_setattenuation(struct rme96 *rme96,
546 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_GAIN_0) &
550 rme96->wcreg = (rme96->wcreg | RME96_WCR_GAIN_0) &
554 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_GAIN_0) |
558 rme96->wcreg = (rme96->wcreg | RME96_WCR_GAIN_0) |
564 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
569 snd_rme96_capture_getrate(struct rme96 *rme96,
575 if (rme96->areg & RME96_AR_ANALOG) {
577 n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) +
578 (((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1);
592 return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate;
595 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
596 if (rme96->rcreg & RME96_RCR_LOCK) {
599 if (rme96->rcreg & RME96_RCR_T_OUT) {
605 if (rme96->rcreg & RME96_RCR_VERF) {
610 n = ((rme96->rcreg >> RME96_RCR_BITPOS_F0) & 1) +
611 (((rme96->rcreg >> RME96_RCR_BITPOS_F1) & 1) << 1) +
612 (((rme96->rcreg >> RME96_RCR_BITPOS_F2) & 1) << 2);
616 if (rme96->rcreg & RME96_RCR_T_OUT) {
632 snd_rme96_playback_getrate(struct rme96 *rme96)
636 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
637 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
638 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0)
643 rate = ((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_0) & 1) +
644 (((rme96->wcreg >> RME96_WCR_BITPOS_FREQ_1) & 1) << 1);
658 return (rme96->wcreg & RME96_WCR_DS) ? rate << 1 : rate;
662 snd_rme96_playback_setrate(struct rme96 *rme96,
667 ds = rme96->wcreg & RME96_WCR_DS;
670 rme96->wcreg &= ~RME96_WCR_DS;
671 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) &
675 rme96->wcreg &= ~RME96_WCR_DS;
676 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_1) &
680 rme96->wcreg &= ~RME96_WCR_DS;
681 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) |
685 rme96->wcreg |= RME96_WCR_DS;
686 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) &
690 rme96->wcreg |= RME96_WCR_DS;
691 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_1) &
695 rme96->wcreg |= RME96_WCR_DS;
696 rme96->wcreg = (rme96->wcreg | RME96_WCR_FREQ_0) |
702 if ((!ds && rme96->wcreg & RME96_WCR_DS) ||
703 (ds && !(rme96->wcreg & RME96_WCR_DS)))
706 snd_rme96_reset_dac(rme96);
708 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
714 snd_rme96_capture_analog_setrate(struct rme96 *rme96,
719 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
723 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
727 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
731 if (rme96->rev < 4) {
734 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) &
738 if (rme96->rev < 4) {
741 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) |
745 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) |
751 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
756 snd_rme96_setclockmode(struct rme96 *rme96,
762 rme96->wcreg &= ~RME96_WCR_MASTER;
763 rme96->areg &= ~RME96_AR_WSEL;
767 rme96->wcreg |= RME96_WCR_MASTER;
768 rme96->areg &= ~RME96_AR_WSEL;
772 rme96->wcreg |= RME96_WCR_MASTER;
773 rme96->areg |= RME96_AR_WSEL;
778 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
779 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
784 snd_rme96_getclockmode(struct rme96 *rme96)
786 if (rme96->areg & RME96_AR_WSEL) {
789 return (rme96->wcreg & RME96_WCR_MASTER) ? RME96_CLOCKMODE_MASTER :
794 snd_rme96_setinputtype(struct rme96 *rme96,
801 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_INP_0) &
805 rme96->wcreg = (rme96->wcreg | RME96_WCR_INP_0) &
809 rme96->wcreg = (rme96->wcreg & ~RME96_WCR_INP_0) |
813 if ((rme96->pci->device != PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST &&
814 rme96->pci->device != PCI_DEVICE_ID_RME_DIGI96_8_PRO) ||
815 (rme96->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST &&
816 rme96->rev > 4))
821 rme96->wcreg = (rme96->wcreg | RME96_WCR_INP_0) |
825 if (!RME96_HAS_ANALOG_IN(rme96)) {
828 rme96->areg |= RME96_AR_ANALOG;
829 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
830 if (rme96->rev < 4) {
835 if (snd_rme96_capture_getrate(rme96, &n) == 88200) {
836 snd_rme96_capture_analog_setrate(rme96, 44100);
838 if (snd_rme96_capture_getrate(rme96, &n) == 64000) {
839 snd_rme96_capture_analog_setrate(rme96, 32000);
846 if (type != RME96_INPUT_ANALOG && RME96_HAS_ANALOG_IN(rme96)) {
847 rme96->areg &= ~RME96_AR_ANALOG;
848 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
850 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
855 snd_rme96_getinputtype(struct rme96 *rme96)
857 if (rme96->areg & RME96_AR_ANALOG) {
860 return ((rme96->wcreg >> RME96_WCR_BITPOS_INP_0) & 1) +
861 (((rme96->wcreg >> RME96_WCR_BITPOS_INP_1) & 1) << 1);
865 snd_rme96_setframelog(struct rme96 *rme96,
878 frlog += (rme96->wcreg & RME96_WCR_MODE24) ? 2 : 1;
879 rme96->playback_frlog = frlog;
881 frlog += (rme96->wcreg & RME96_WCR_MODE24_2) ? 2 : 1;
882 rme96->capture_frlog = frlog;
887 snd_rme96_playback_setformat(struct rme96 *rme96,
892 rme96->wcreg &= ~RME96_WCR_MODE24;
895 rme96->wcreg |= RME96_WCR_MODE24;
900 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
905 snd_rme96_capture_setformat(struct rme96 *rme96,
910 rme96->wcreg &= ~RME96_WCR_MODE24_2;
913 rme96->wcreg |= RME96_WCR_MODE24_2;
918 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
923 snd_rme96_set_period_properties(struct rme96 *rme96,
928 rme96->wcreg &= ~RME96_WCR_ISEL;
931 rme96->wcreg |= RME96_WCR_ISEL;
937 rme96->wcreg &= ~RME96_WCR_IDIS;
938 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
945 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
949 runtime->dma_area = (void __force *)(rme96->iobase +
951 runtime->dma_addr = rme96->port + RME96_IO_PLAY_BUFFER;
954 spin_lock_irq(&rme96->lock);
955 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
956 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
957 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0)
961 spin_unlock_irq(&rme96->lock);
964 } else if ((err = snd_rme96_playback_setrate(rme96, params_rate(params))) < 0) {
965 spin_unlock_irq(&rme96->lock);
968 if ((err = snd_rme96_playback_setformat(rme96, params_format(params))) < 0) {
969 spin_unlock_irq(&rme96->lock);
972 snd_rme96_setframelog(rme96, params_channels(params), 1);
973 if (rme96->capture_periodsize != 0) {
974 if (params_period_size(params) << rme96->playback_frlog !=
975 rme96->capture_periodsize)
977 spin_unlock_irq(&rme96->lock);
981 rme96->playback_periodsize =
982 params_period_size(params) << rme96->playback_frlog;
983 snd_rme96_set_period_properties(rme96, rme96->playback_periodsize);
985 if ((rme96->wcreg & RME96_WCR_ADAT) == 0) {
986 rme96->wcreg &= ~(RME96_WCR_PRO | RME96_WCR_DOLBY | RME96_WCR_EMP);
987 writel(rme96->wcreg |= rme96->wcreg_spdif_stream, rme96->iobase + RME96_IO_CONTROL_REGISTER);
989 spin_unlock_irq(&rme96->lock);
998 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1002 runtime->dma_area = (void __force *)(rme96->iobase +
1004 runtime->dma_addr = rme96->port + RME96_IO_REC_BUFFER;
1007 spin_lock_irq(&rme96->lock);
1008 if ((err = snd_rme96_capture_setformat(rme96, params_format(params))) < 0) {
1009 spin_unlock_irq(&rme96->lock);
1012 if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
1013 if ((err = snd_rme96_capture_analog_setrate(rme96,
1016 spin_unlock_irq(&rme96->lock);
1019 } else if ((rate = snd_rme96_capture_getrate(rme96, &isadat)) > 0) {
1021 spin_unlock_irq(&rme96->lock);
1027 spin_unlock_irq(&rme96->lock);
1031 snd_rme96_setframelog(rme96, params_channels(params), 0);
1032 if (rme96->playback_periodsize != 0) {
1033 if (params_period_size(params) << rme96->capture_frlog !=
1034 rme96->playback_periodsize)
1036 spin_unlock_irq(&rme96->lock);
1040 rme96->capture_periodsize =
1041 params_period_size(params) << rme96->capture_frlog;
1042 snd_rme96_set_period_properties(rme96, rme96->capture_periodsize);
1043 spin_unlock_irq(&rme96->lock);
1049 snd_rme96_playback_start(struct rme96 *rme96,
1053 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1056 rme96->wcreg |= RME96_WCR_START;
1057 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1061 snd_rme96_capture_start(struct rme96 *rme96,
1065 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1068 rme96->wcreg |= RME96_WCR_START_2;
1069 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1073 snd_rme96_playback_stop(struct rme96 *rme96)
1079 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1080 if (rme96->rcreg & RME96_RCR_IRQ) {
1081 writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
1083 rme96->wcreg &= ~RME96_WCR_START;
1084 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1088 snd_rme96_capture_stop(struct rme96 *rme96)
1090 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1091 if (rme96->rcreg & RME96_RCR_IRQ_2) {
1092 writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
1094 rme96->wcreg &= ~RME96_WCR_START_2;
1095 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1102 struct rme96 *rme96 = (struct rme96 *)dev_id;
1104 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1106 if (!((rme96->rcreg & RME96_RCR_IRQ) ||
1107 (rme96->rcreg & RME96_RCR_IRQ_2)))
1112 if (rme96->rcreg & RME96_RCR_IRQ) {
1114 snd_pcm_period_elapsed(rme96->playback_substream);
1115 writel(0, rme96->iobase + RME96_IO_CONFIRM_PLAY_IRQ);
1117 if (rme96->rcreg & RME96_RCR_IRQ_2) {
1119 snd_pcm_period_elapsed(rme96->capture_substream);
1120 writel(0, rme96->iobase + RME96_IO_CONFIRM_REC_IRQ);
1134 rme96_set_buffer_size_constraint(struct rme96 *rme96,
1141 if ((size = rme96->playback_periodsize) != 0 ||
1142 (size = rme96->capture_periodsize) != 0)
1156 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1159 spin_lock_irq(&rme96->lock);
1160 if (rme96->playback_substream != NULL) {
1161 spin_unlock_irq(&rme96->lock);
1164 rme96->wcreg &= ~RME96_WCR_ADAT;
1165 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1166 rme96->playback_substream = substream;
1167 spin_unlock_irq(&rme96->lock);
1170 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
1171 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
1172 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0)
1179 rme96_set_buffer_size_constraint(rme96, runtime);
1181 rme96->wcreg_spdif_stream = rme96->wcreg_spdif;
1182 rme96->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1183 snd_ctl_notify(rme96->card, SNDRV_CTL_EVENT_MASK_VALUE |
1184 SNDRV_CTL_EVENT_MASK_INFO, &rme96->spdif_ctl->id);
1192 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1196 if (snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
1197 (rate = snd_rme96_capture_getrate(rme96, &isadat)) > 0)
1207 spin_lock_irq(&rme96->lock);
1208 if (rme96->capture_substream != NULL) {
1209 spin_unlock_irq(&rme96->lock);
1212 rme96->capture_substream = substream;
1213 spin_unlock_irq(&rme96->lock);
1215 rme96_set_buffer_size_constraint(rme96, runtime);
1223 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1226 spin_lock_irq(&rme96->lock);
1227 if (rme96->playback_substream != NULL) {
1228 spin_unlock_irq(&rme96->lock);
1231 rme96->wcreg |= RME96_WCR_ADAT;
1232 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1233 rme96->playback_substream = substream;
1234 spin_unlock_irq(&rme96->lock);
1237 if (!(rme96->wcreg & RME96_WCR_MASTER) &&
1238 snd_rme96_getinputtype(rme96) != RME96_INPUT_ANALOG &&
1239 (rate = snd_rme96_capture_getrate(rme96, &dummy)) > 0)
1246 rme96_set_buffer_size_constraint(rme96, runtime);
1254 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1258 if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
1263 if ((rate = snd_rme96_capture_getrate(rme96, &isadat)) > 0) {
1272 spin_lock_irq(&rme96->lock);
1273 if (rme96->capture_substream != NULL) {
1274 spin_unlock_irq(&rme96->lock);
1277 rme96->capture_substream = substream;
1278 spin_unlock_irq(&rme96->lock);
1280 rme96_set_buffer_size_constraint(rme96, runtime);
1287 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1290 spin_lock_irq(&rme96->lock);
1291 if (RME96_ISPLAYING(rme96)) {
1292 snd_rme96_playback_stop(rme96);
1294 rme96->playback_substream = NULL;
1295 rme96->playback_periodsize = 0;
1296 spdif = (rme96->wcreg & RME96_WCR_ADAT) == 0;
1297 spin_unlock_irq(&rme96->lock);
1299 rme96->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1300 snd_ctl_notify(rme96->card, SNDRV_CTL_EVENT_MASK_VALUE |
1301 SNDRV_CTL_EVENT_MASK_INFO, &rme96->spdif_ctl->id);
1309 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1311 spin_lock_irq(&rme96->lock);
1312 if (RME96_ISRECORDING(rme96)) {
1313 snd_rme96_capture_stop(rme96);
1315 rme96->capture_substream = NULL;
1316 rme96->capture_periodsize = 0;
1317 spin_unlock_irq(&rme96->lock);
1324 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1326 spin_lock_irq(&rme96->lock);
1327 if (RME96_ISPLAYING(rme96)) {
1328 snd_rme96_playback_stop(rme96);
1330 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1331 spin_unlock_irq(&rme96->lock);
1338 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1340 spin_lock_irq(&rme96->lock);
1341 if (RME96_ISRECORDING(rme96)) {
1342 snd_rme96_capture_stop(rme96);
1344 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1345 spin_unlock_irq(&rme96->lock);
1353 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1357 if (!RME96_ISPLAYING(rme96)) {
1358 if (substream != rme96->playback_substream) {
1361 snd_rme96_playback_start(rme96, 0);
1366 if (RME96_ISPLAYING(rme96)) {
1367 if (substream != rme96->playback_substream) {
1370 snd_rme96_playback_stop(rme96);
1375 if (RME96_ISPLAYING(rme96)) {
1376 snd_rme96_playback_stop(rme96);
1381 if (!RME96_ISPLAYING(rme96)) {
1382 snd_rme96_playback_start(rme96, 1);
1396 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1400 if (!RME96_ISRECORDING(rme96)) {
1401 if (substream != rme96->capture_substream) {
1404 snd_rme96_capture_start(rme96, 0);
1409 if (RME96_ISRECORDING(rme96)) {
1410 if (substream != rme96->capture_substream) {
1413 snd_rme96_capture_stop(rme96);
1418 if (RME96_ISRECORDING(rme96)) {
1419 snd_rme96_capture_stop(rme96);
1424 if (!RME96_ISRECORDING(rme96)) {
1425 snd_rme96_capture_start(rme96, 1);
1439 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1440 return snd_rme96_playback_ptr(rme96);
1446 struct rme96 *rme96 = snd_pcm_substream_chip(substream);
1447 return snd_rme96_capture_ptr(rme96);
1503 struct rme96 *rme96 = (struct rme96 *)private_data;
1505 if (rme96 == NULL) {
1508 if (rme96->irq >= 0) {
1509 snd_rme96_playback_stop(rme96);
1510 snd_rme96_capture_stop(rme96);
1511 rme96->areg &= ~RME96_AR_DAC_EN;
1512 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1513 free_irq(rme96->irq, (void *)rme96);
1514 rme96->irq = -1;
1516 if (rme96->iobase) {
1517 iounmap(rme96->iobase);
1518 rme96->iobase = NULL;
1520 if (rme96->port) {
1521 pci_release_regions(rme96->pci);
1522 rme96->port = 0;
1524 pci_disable_device(rme96->pci);
1530 struct rme96 *rme96 = (struct rme96 *) pcm->private_data;
1531 rme96->spdif_pcm = NULL;
1537 struct rme96 *rme96 = (struct rme96 *) pcm->private_data;
1538 rme96->adat_pcm = NULL;
1542 snd_rme96_create(struct rme96 *rme96)
1544 struct pci_dev *pci = rme96->pci;
1547 rme96->irq = -1;
1548 spin_lock_init(&rme96->lock);
1555 rme96->port = pci_resource_start(rme96->pci, 0);
1557 rme96->iobase = ioremap_nocache(rme96->port, RME96_IO_SIZE);
1558 if (!rme96->iobase) {
1559 snd_printk(KERN_ERR "unable to remap memory region 0x%lx-0x%lx\n", rme96->port, rme96->port + RME96_IO_SIZE - 1);
1564 "RME96", rme96)) {
1568 rme96->irq = pci->irq;
1571 pci_read_config_byte(pci, 8, &rme96->rev);
1574 if ((err = snd_pcm_new(rme96->card, "Digi96 IEC958", 0,
1575 1, 1, &rme96->spdif_pcm)) < 0)
1579 rme96->spdif_pcm->private_data = rme96;
1580 rme96->spdif_pcm->private_free = snd_rme96_free_spdif_pcm;
1581 strcpy(rme96->spdif_pcm->name, "Digi96 IEC958");
1582 snd_pcm_set_ops(rme96->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme96_playback_spdif_ops);
1583 snd_pcm_set_ops(rme96->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme96_capture_spdif_ops);
1585 rme96->spdif_pcm->info_flags = 0;
1590 rme96->adat_pcm = NULL;
1592 if ((err = snd_pcm_new(rme96->card, "Digi96 ADAT", 1,
1593 1, 1, &rme96->adat_pcm)) < 0)
1597 rme96->adat_pcm->private_data = rme96;
1598 rme96->adat_pcm->private_free = snd_rme96_free_adat_pcm;
1599 strcpy(rme96->adat_pcm->name, "Digi96 ADAT");
1600 snd_pcm_set_ops(rme96->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme96_playback_adat_ops);
1601 snd_pcm_set_ops(rme96->adat_pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme96_capture_adat_ops);
1603 rme96->adat_pcm->info_flags = 0;
1606 rme96->playback_periodsize = 0;
1607 rme96->capture_periodsize = 0;
1610 snd_rme96_playback_stop(rme96);
1611 snd_rme96_capture_stop(rme96);
1614 rme96->wcreg =
1620 rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */
1622 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1623 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1626 writel(rme96->areg | RME96_AR_PD2,
1627 rme96->iobase + RME96_IO_ADDITIONAL_REG);
1628 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1631 snd_rme96_reset_dac(rme96);
1632 rme96->areg |= RME96_AR_DAC_EN;
1633 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG);
1636 writel(0, rme96->iobase + RME96_IO_RESET_PLAY_POS);
1637 writel(0, rme96->iobase + RME96_IO_RESET_REC_POS);
1640 rme96->vol[0] = rme96->vol[1] = 0;
1641 if (RME96_HAS_ANALOG_OUT(rme96)) {
1642 snd_rme96_apply_dac_volume(rme96);
1646 if ((err = snd_rme96_create_switches(rme96->card, rme96)) < 0) {
1651 snd_rme96_proc_init(rme96);
1664 struct rme96 *rme96 = (struct rme96 *)entry->private_data;
1666 rme96->rcreg = readl(rme96->iobase + RME96_IO_CONTROL_REGISTER);
1668 snd_iprintf(buffer, rme96->card->longname);
1669 snd_iprintf(buffer, " (index #%d)\n", rme96->card->number + 1);
1672 if (rme96->wcreg & RME96_WCR_IDIS) {
1675 } else if (rme96->wcreg & RME96_WCR_ISEL) {
1681 switch (snd_rme96_getinputtype(rme96)) {
1698 if (snd_rme96_capture_getrate(rme96, &n) < 0) {
1707 snd_rme96_capture_getrate(rme96, &n));
1709 if (rme96->wcreg & RME96_WCR_MODE24_2) {
1716 if (rme96->wcreg & RME96_WCR_SEL) {
1722 snd_rme96_playback_getrate(rme96));
1723 if (rme96->wcreg & RME96_WCR_MODE24) {
1728 if (rme96->areg & RME96_AR_WSEL) {
1730 } else if (rme96->wcreg & RME96_WCR_MASTER) {
1732 } else if (snd_rme96_getinputtype(rme96) == RME96_INPUT_ANALOG) {
1734 } else if (snd_rme96_capture_getrate(rme96, &n) < 0) {
1739 if (rme96->wcreg & RME96_WCR_PRO) {
1744 if (rme96->wcreg & RME96_WCR_EMP) {
1749 if (rme96->wcreg & RME96_WCR_DOLBY) {
1754 if (RME96_HAS_ANALOG_IN(rme96)) {
1756 switch (snd_rme96_getmontracks(rme96)) {
1770 switch (snd_rme96_getattenuation(rme96)) {
1784 snd_iprintf(buffer, " volume left: %u\n", rme96->vol[0]);
1785 snd_iprintf(buffer, " volume right: %u\n", rme96->vol[1]);
1790 snd_rme96_proc_init(struct rme96 *rme96)
1794 if (! snd_card_proc_new(rme96->card, "rme96", &entry))
1795 snd_info_set_text_ops(entry, rme96, snd_rme96_proc_read);
1807 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1809 spin_lock_irq(&rme96->lock);
1810 ucontrol->value.integer.value[0] = rme96->wcreg & RME96_WCR_SEL ? 0 : 1;
1811 spin_unlock_irq(&rme96->lock);
1817 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1822 spin_lock_irq(&rme96->lock);
1823 val = (rme96->wcreg & ~RME96_WCR_SEL) | val;
1824 change = val != rme96->wcreg;
1825 rme96->wcreg = val;
1826 writel(val, rme96->iobase + RME96_IO_CONTROL_REGISTER);
1827 spin_unlock_irq(&rme96->lock);
1835 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1840 switch (rme96->pci->device) {
1849 if (rme96->rev > 4) {
1871 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1874 spin_lock_irq(&rme96->lock);
1875 ucontrol->value.enumerated.item[0] = snd_rme96_getinputtype(rme96);
1877 switch (rme96->pci->device) {
1886 if (rme96->rev > 4) {
1904 spin_unlock_irq(&rme96->lock);
1910 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1914 switch (rme96->pci->device) {
1923 if (rme96->rev > 4) {
1936 if (rme96->pci->device == PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST && rme96->rev > 4) {
1942 spin_lock_irq(&rme96->lock);
1943 change = (int)val != snd_rme96_getinputtype(rme96);
1944 snd_rme96_setinputtype(rme96, val);
1945 spin_unlock_irq(&rme96->lock);
1966 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1968 spin_lock_irq(&rme96->lock);
1969 ucontrol->value.enumerated.item[0] = snd_rme96_getclockmode(rme96);
1970 spin_unlock_irq(&rme96->lock);
1976 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
1981 spin_lock_irq(&rme96->lock);
1982 change = (int)val != snd_rme96_getclockmode(rme96);
1983 snd_rme96_setclockmode(rme96, val);
1984 spin_unlock_irq(&rme96->lock);
2005 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2007 spin_lock_irq(&rme96->lock);
2008 ucontrol->value.enumerated.item[0] = snd_rme96_getattenuation(rme96);
2009 spin_unlock_irq(&rme96->lock);
2015 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2020 spin_lock_irq(&rme96->lock);
2022 change = (int)val != snd_rme96_getattenuation(rme96);
2023 snd_rme96_setattenuation(rme96, val);
2024 spin_unlock_irq(&rme96->lock);
2045 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2047 spin_lock_irq(&rme96->lock);
2048 ucontrol->value.enumerated.item[0] = snd_rme96_getmontracks(rme96);
2049 spin_unlock_irq(&rme96->lock);
2055 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2060 spin_lock_irq(&rme96->lock);
2061 change = (int)val != snd_rme96_getmontracks(rme96);
2062 snd_rme96_setmontracks(rme96, val);
2063 spin_unlock_irq(&rme96->lock);
2098 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2100 snd_rme96_convert_to_aes(&ucontrol->value.iec958, rme96->wcreg_spdif);
2106 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2111 spin_lock_irq(&rme96->lock);
2112 change = val != rme96->wcreg_spdif;
2113 rme96->wcreg_spdif = val;
2114 spin_unlock_irq(&rme96->lock);
2127 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2129 snd_rme96_convert_to_aes(&ucontrol->value.iec958, rme96->wcreg_spdif_stream);
2135 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2140 spin_lock_irq(&rme96->lock);
2141 change = val != rme96->wcreg_spdif_stream;
2142 rme96->wcreg_spdif_stream = val;
2143 rme96->wcreg &= ~(RME96_WCR_PRO | RME96_WCR_DOLBY | RME96_WCR_EMP);
2144 rme96->wcreg |= val;
2145 writel(rme96->wcreg, rme96->iobase + RME96_IO_CONTROL_REGISTER);
2146 spin_unlock_irq(&rme96->lock);
2166 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2171 uinfo->value.integer.max = RME96_185X_MAX_OUT(rme96);
2178 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2180 spin_lock_irq(&rme96->lock);
2181 u->value.integer.value[0] = rme96->vol[0];
2182 u->value.integer.value[1] = rme96->vol[1];
2183 spin_unlock_irq(&rme96->lock);
2191 struct rme96 *rme96 = snd_kcontrol_chip(kcontrol);
2196 if (!RME96_HAS_ANALOG_OUT(rme96))
2198 maxvol = RME96_185X_MAX_OUT(rme96);
2199 spin_lock_irq(&rme96->lock);
2201 if (vol != rme96->vol[0] && vol <= maxvol) {
2202 rme96->vol[0] = vol;
2206 if (vol != rme96->vol[1] && vol <= maxvol) {
2207 rme96->vol[1] = vol;
2211 snd_rme96_apply_dac_volume(rme96);
2212 spin_unlock_irq(&rme96->lock);
2299 struct rme96 *rme96)
2305 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme96_controls[idx], rme96))) < 0)
2308 rme96->spdif_ctl = kctl;
2311 if (RME96_HAS_ANALOG_OUT(rme96)) {
2313 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_rme96_controls[idx], rme96))) < 0)
2334 struct rme96 *rme96;
2347 sizeof(struct rme96), &card);
2351 rme96 = (struct rme96 *)card->private_data;
2352 rme96->card = card;
2353 rme96->pci = pci;
2355 if ((err = snd_rme96_create(rme96)) < 0) {
2361 switch (rme96->pci->device) {
2372 pci_read_config_byte(rme96->pci, 8, &val);
2381 rme96->port, rme96->irq);