Lines Matching refs:wcreg
200 u32 wcreg; /* cached write control register value */
238 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
402 writel(rme32->wcreg | RME32_WCR_PD,
404 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
411 rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
412 (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
426 return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
495 ds = rme32->wcreg & RME32_WCR_DS_BM;
498 rme32->wcreg &= ~RME32_WCR_DS_BM;
499 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
503 rme32->wcreg &= ~RME32_WCR_DS_BM;
504 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
508 rme32->wcreg &= ~RME32_WCR_DS_BM;
509 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
515 rme32->wcreg |= RME32_WCR_DS_BM;
516 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
522 rme32->wcreg |= RME32_WCR_DS_BM;
523 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
529 rme32->wcreg |= RME32_WCR_DS_BM;
530 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
536 if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
537 (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
542 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
552 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
557 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
562 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
567 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
573 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
579 return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
580 (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
587 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
591 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
595 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
599 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
605 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
611 return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
612 (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
627 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
630 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
639 rme32->wcreg &= ~RME32_WCR_MODE24;
642 rme32->wcreg |= RME32_WCR_MODE24;
647 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
696 if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
697 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
698 rme32->wcreg |= rme32->wcreg_spdif_stream;
699 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
727 rme32->wcreg |= RME32_WCR_AUTOSYNC;
728 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
750 rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
751 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
782 rme32->wcreg |= RME32_WCR_START;
783 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
796 rme32->wcreg &= ~RME32_WCR_START;
797 if (rme32->wcreg & RME32_WCR_SEL)
798 rme32->wcreg |= RME32_WCR_MUTE;
799 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
857 rme32->wcreg &= ~RME32_WCR_ADAT;
858 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
939 rme32->wcreg |= RME32_WCR_ADAT;
940 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1002 spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1036 if (rme32->wcreg & RME32_WCR_SEL)
1037 rme32->wcreg &= ~RME32_WCR_MUTE;
1038 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1438 rme32->wcreg = RME32_WCR_SEL | /* normal playback */
1441 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1483 if (rme32->wcreg & RME32_WCR_MODE24) {
1488 if (rme32->wcreg & RME32_WCR_MONO) {
1522 if (rme32->wcreg & RME32_WCR_SEL) {
1527 if (rme32->wcreg & RME32_WCR_MUTE) {
1535 ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1536 && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1545 if (rme32->wcreg & RME32_WCR_PRO) {
1550 if (rme32->wcreg & RME32_WCR_EMP) {
1579 rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1593 val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1594 change = val != rme32->wcreg;
1599 rme32->wcreg = val;
1823 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1824 rme32->wcreg |= val;
1825 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);