Lines Matching refs:rmh
228 struct pcxhr_rmh rmh;
256 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE);
257 rmh.cmd[0] |= IO_NUM_REG_GENCLK;
258 rmh.cmd[1] = pllreg & MASK_DSP_WORD;
259 rmh.cmd[2] = pllreg >> 24;
260 rmh.cmd_len = 3;
261 err = pcxhr_send_msg(mgr, &rmh);
302 struct pcxhr_rmh rmh;
317 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* mute outputs */
318 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
320 rmh.cmd[1] = 1;
321 rmh.cmd_len = 2;
323 err = pcxhr_send_msg(mgr, &rmh);
327 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* set speed ratio */
328 rmh.cmd[0] |= IO_NUM_SPEED_RATIO;
329 rmh.cmd[1] = speed;
330 rmh.cmd_len = 2;
331 err = pcxhr_send_msg(mgr, &rmh);
347 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); /* unmute outputs */
348 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
350 rmh.cmd[1] = 1;
351 rmh.cmd_len = 2;
353 err = pcxhr_send_msg(mgr, &rmh);
371 struct pcxhr_rmh rmh;
386 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK);
387 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT; /* resync fifos */
389 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD;
391 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2;
392 rmh.cmd[2] = rate;
393 rmh.cmd_len = 3;
394 err = pcxhr_send_msg(mgr, &rmh);
406 struct pcxhr_rmh rmh;
432 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
433 rmh.cmd_len = 2;
434 rmh.cmd[0] |= IO_NUM_REG_STATUS;
436 rmh.cmd[1] = reg;
437 err = pcxhr_send_msg(mgr, &rmh);
443 rmh.cmd[1] = REG_STATUS_CURRENT;
444 err = pcxhr_send_msg(mgr, &rmh);
447 switch (rmh.stat[1] & 0x0f) {
484 struct pcxhr_rmh rmh;
508 pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM);
509 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,
514 err = pcxhr_send_msg(chip->mgr, &rmh);
536 struct pcxhr_rmh rmh;
580 pcxhr_init_rmh(&rmh, is_capture ?
582 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,
588 rmh.cmd[0] |= 1<<10;
590 rmh.cmd[0] |= 1<<12;
592 rmh.cmd[1] = 0;
593 rmh.cmd_len = 2;
596 rmh.cmd[1] = stream->channels;
599 rmh.cmd[2] = (stream->channels == 1) ? 0x01 : 0x03;
600 rmh.cmd_len = 3;
603 rmh.cmd[rmh.cmd_len++] = header >> 8;
604 rmh.cmd[rmh.cmd_len++] = (header & 0xff) << 16;
605 err = pcxhr_send_msg(chip->mgr, &rmh);
614 struct pcxhr_rmh rmh;
627 pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS);
628 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,
634 rmh.cmd[1] = subs->runtime->dma_bytes * 8;
636 rmh.cmd[2] = subs->runtime->dma_addr >> 24;
638 rmh.cmd[2] |= 1<<19;
640 rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD;
641 rmh.cmd_len = 4;
642 err = pcxhr_send_msg(chip->mgr, &rmh);
851 struct pcxhr_rmh rmh;
854 pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT);
858 rmh.cmd[0] |= mgr->granularity;
860 err = pcxhr_send_msg(mgr, &rmh);
1215 struct pcxhr_rmh rmh;
1229 pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES);
1230 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1231 int cur = rmh.stat[0];
1232 int ref = rmh.stat[1];
1245 rmh.stat[2], rmh.stat[3]);
1259 rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS;
1260 rmh.cmd_len = 1;
1261 rmh.stat_len = PCXHR_SIZE_MAX_STATUS;
1262 rmh.dsp_stat = 0;
1263 rmh.cmd_idx = CMD_LAST_INDEX;
1264 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1266 if (rmh.stat_len > 8)
1267 rmh.stat_len = 8;
1268 for (i = 0; i < rmh.stat_len; i++)
1270 i, rmh.stat[i]);