Lines Matching refs:ichdev
168 struct ichdev {
206 struct ichdev ichd[2];
384 static void snd_intel8x0_setup_periods(struct intel8x0m *chip, struct ichdev *ichdev)
387 u32 *bdbar = ichdev->bdbar;
388 unsigned long port = ichdev->reg_offset;
390 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);
391 if (ichdev->size == ichdev->fragsize) {
392 ichdev->ack_reload = ichdev->ack = 2;
393 ichdev->fragsize1 = ichdev->fragsize >> 1;
395 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf);
397 ichdev->fragsize1 >> chip->pcm_pos_shift);
398 bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1));
400 ichdev->fragsize1 >> chip->pcm_pos_shift);
402 ichdev->frags = 2;
404 ichdev->ack_reload = ichdev->ack = 1;
405 ichdev->fragsize1 = ichdev->fragsize;
407 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + (((idx >> 1) * ichdev->fragsize) % ichdev->size));
409 ichdev->fragsize >> chip->pcm_pos_shift);
415 ichdev->frags = ichdev->size / ichdev->fragsize;
417 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK);
418 ichdev->civ = 0;
420 ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;
421 ichdev->position = 0;
423 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
430 static inline void snd_intel8x0_update(struct intel8x0m *chip, struct ichdev *ichdev)
432 unsigned long port = ichdev->reg_offset;
437 if (civ == ichdev->civ) {
440 ichdev->civ++;
441 ichdev->civ &= ICH_REG_LVI_MASK;
443 step = civ - ichdev->civ;
447 // snd_printd("step = %d, %d -> %d\n", step, ichdev->civ, civ);
448 ichdev->civ = civ;
451 ichdev->position += step * ichdev->fragsize1;
452 ichdev->position %= ichdev->size;
453 ichdev->lvi += step;
454 ichdev->lvi &= ICH_REG_LVI_MASK;
455 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);
457 ichdev->lvi_frag++;
458 ichdev->lvi_frag %= ichdev->frags;
459 ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf +
460 ichdev->lvi_frag *
461 ichdev->fragsize1);
462 if (--ichdev->ack == 0) {
463 ichdev->ack = ichdev->ack_reload;
467 if (ack && ichdev->substream) {
469 snd_pcm_period_elapsed(ichdev->substream);
472 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
478 struct ichdev *ichdev;
496 ichdev = &chip->ichd[i];
497 if (status & ichdev->int_sta_mask)
498 snd_intel8x0_update(chip, ichdev);
515 struct ichdev *ichdev = get_ichdev(substream);
517 unsigned long port = ichdev->reg_offset;
540 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;
561 struct ichdev *ichdev = get_ichdev(substream);
564 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb) << chip->pcm_pos_shift;
566 ptr = ichdev->fragsize1 - ptr1;
569 ptr += ichdev->position;
570 if (ptr >= ichdev->size)
579 struct ichdev *ichdev = get_ichdev(substream);
581 ichdev->physbuf = runtime->dma_addr;
582 ichdev->size = snd_pcm_lib_buffer_bytes(substream);
583 ichdev->fragsize = snd_pcm_lib_period_bytes(substream);
584 snd_ac97_write(ichdev->ac97, AC97_LINE1_RATE, runtime->rate);
585 snd_ac97_write(ichdev->ac97, AC97_LINE1_LEVEL, 0);
586 snd_intel8x0_setup_periods(chip, ichdev);
612 static int snd_intel8x0m_pcm_open(struct snd_pcm_substream *substream, struct ichdev *ichdev)
623 ichdev->substream = substream;
629 runtime->private_data = ichdev;
1083 struct ichdev *ichdev;
1156 ichdev = &chip->ichd[i];
1157 ichdev->ichd = i;
1158 ichdev->reg_offset = tbl[i].offset;
1159 ichdev->int_sta_mask = tbl[i].int_sta_mask;
1162 ichdev->roff_sr = ICH_REG_OFF_PICB;
1163 ichdev->roff_picb = ICH_REG_OFF_SR;
1165 ichdev->roff_sr = ICH_REG_OFF_SR;
1166 ichdev->roff_picb = ICH_REG_OFF_PICB;
1169 ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10;
1186 ichdev = &chip->ichd[i];
1187 ichdev->bdbar = ((u32 *)chip->bdbars.area) + (i * ICH_MAX_FRAGS * 2);
1188 ichdev->bdbar_addr = chip->bdbars.addr + (i * sizeof(u32) * ICH_MAX_FRAGS * 2);
1189 int_sta_masks |= ichdev->int_sta_mask;