Lines Matching defs:ice
82 static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
85 return ((unsigned short)ice->akm[0].images[reg] << 8) |
86 ice->akm[0].images[reg + 1];
92 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
96 snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
99 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
101 wm_put_nocache(ice, reg, val);
103 ice->akm[0].images[reg] = val >> 8;
104 ice->akm[0].images[reg + 1] = val;
126 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
130 mutex_lock(&ice->gpio_mutex);
132 val = wm_get(ice, WM_DAC_ATTEN_L + i) & 0xff;
136 mutex_unlock(&ice->gpio_mutex);
142 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
146 mutex_lock(&ice->gpio_mutex);
151 oval = wm_get(ice, idx) & 0xff;
153 wm_put(ice, idx, nval);
154 wm_put_nocache(ice, idx, nval | 0x100);
158 mutex_unlock(&ice->gpio_mutex);
181 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
185 mutex_lock(&ice->gpio_mutex);
187 val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
191 mutex_unlock(&ice->gpio_mutex);
197 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
201 mutex_lock(&ice->gpio_mutex);
206 ovol = wm_get(ice, idx) & 0xff;
208 wm_put(ice, idx, nvol);
212 mutex_unlock(&ice->gpio_mutex);
223 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
226 mutex_lock(&ice->gpio_mutex);
227 ucontrol->value.integer.value[0] = (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
228 mutex_unlock(&ice->gpio_mutex);
234 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
239 mutex_lock(&ice->gpio_mutex);
240 nval = oval = wm_get(ice, WM_ADC_MUX);
247 wm_put(ice, WM_ADC_MUX, nval);
249 mutex_unlock(&ice->gpio_mutex);
260 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
262 mutex_lock(&ice->gpio_mutex);
263 ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
264 mutex_unlock(&ice->gpio_mutex);
270 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
274 mutex_lock(&ice->gpio_mutex);
275 val = oval = wm_get(ice, WM_OUT_MUX);
281 wm_put(ice, WM_OUT_MUX, val);
284 mutex_unlock(&ice->gpio_mutex);
295 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
297 mutex_lock(&ice->gpio_mutex);
298 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
299 mutex_unlock(&ice->gpio_mutex);
305 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
309 mutex_lock(&ice->gpio_mutex);
310 oval = wm_get(ice, WM_DAC_CTRL1);
317 wm_put(ice, WM_DAC_CTRL1, val);
318 wm_put_nocache(ice, WM_DAC_CTRL1, val);
321 mutex_unlock(&ice->gpio_mutex);
328 static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
330 unsigned int tmp = snd_ice1712_gpio_read(ice);
335 snd_ice1712_gpio_write(ice, tmp);
338 static void spi_send_byte(struct snd_ice1712 *ice, unsigned char data)
342 set_gpio_bit(ice, PONTIS_CS_CLK, 0);
344 set_gpio_bit(ice, PONTIS_CS_WDATA, data & 0x80);
346 set_gpio_bit(ice, PONTIS_CS_CLK, 1);
352 static unsigned int spi_read_byte(struct snd_ice1712 *ice)
359 set_gpio_bit(ice, PONTIS_CS_CLK, 0);
361 if (snd_ice1712_gpio_read(ice) & PONTIS_CS_RDATA)
364 set_gpio_bit(ice, PONTIS_CS_CLK, 1);
371 static void spi_write(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg, unsigned int data)
373 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
374 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
375 set_gpio_bit(ice, PONTIS_CS_CS, 0);
376 spi_send_byte(ice, dev & ~1); /* WRITE */
377 spi_send_byte(ice, reg); /* MAP */
378 spi_send_byte(ice, data); /* DATA */
380 set_gpio_bit(ice, PONTIS_CS_CS, 1);
383 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
384 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
387 static unsigned int spi_read(struct snd_ice1712 *ice, unsigned int dev, unsigned int reg)
390 snd_ice1712_gpio_set_dir(ice, PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK);
391 snd_ice1712_gpio_set_mask(ice, ~(PONTIS_CS_CS|PONTIS_CS_WDATA|PONTIS_CS_CLK));
392 set_gpio_bit(ice, PONTIS_CS_CS, 0);
393 spi_send_byte(ice, dev & ~1); /* WRITE */
394 spi_send_byte(ice, reg); /* MAP */
396 set_gpio_bit(ice, PONTIS_CS_CS, 1);
398 set_gpio_bit(ice, PONTIS_CS_CS, 0);
399 spi_send_byte(ice, dev | 1); /* READ */
400 val = spi_read_byte(ice);
402 set_gpio_bit(ice, PONTIS_CS_CS, 1);
405 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
406 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
432 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
434 mutex_lock(&ice->gpio_mutex);
435 ucontrol->value.enumerated.item[0] = ice->gpio.saved[0];
436 mutex_unlock(&ice->gpio_mutex);
442 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
446 mutex_lock(&ice->gpio_mutex);
447 if (ucontrol->value.enumerated.item[0] != ice->gpio.saved[0]) {
448 ice->gpio.saved[0] = ucontrol->value.enumerated.item[0] & 3;
449 val = 0x80 | (ice->gpio.saved[0] << 3);
450 spi_write(ice, CS_DEV, 0x04, val);
453 mutex_unlock(&ice->gpio_mutex);
472 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
473 mutex_lock(&ice->gpio_mutex);
475 ucontrol->value.integer.value[0] = (~ice->gpio.write_mask & 0xffff) | 0x00f0;
476 mutex_unlock(&ice->gpio_mutex);
482 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
485 mutex_lock(&ice->gpio_mutex);
488 changed = val != ice->gpio.write_mask;
489 ice->gpio.write_mask = val;
490 mutex_unlock(&ice->gpio_mutex);
496 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
497 mutex_lock(&ice->gpio_mutex);
499 ucontrol->value.integer.value[0] = ice->gpio.direction & 0xff0f;
500 mutex_unlock(&ice->gpio_mutex);
506 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
509 mutex_lock(&ice->gpio_mutex);
512 changed = (val != ice->gpio.direction);
513 ice->gpio.direction = val;
514 mutex_unlock(&ice->gpio_mutex);
520 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
521 mutex_lock(&ice->gpio_mutex);
522 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
523 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
524 ucontrol->value.integer.value[0] = snd_ice1712_gpio_read(ice) & 0xffff;
525 mutex_unlock(&ice->gpio_mutex);
531 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
534 mutex_lock(&ice->gpio_mutex);
535 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
536 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
537 val = snd_ice1712_gpio_read(ice) & 0xffff;
540 snd_ice1712_gpio_write(ice, nval);
543 mutex_unlock(&ice->gpio_mutex);
640 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
643 mutex_lock(&ice->gpio_mutex);
648 wm_put(ice, reg, val);
650 mutex_unlock(&ice->gpio_mutex);
655 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
658 mutex_lock(&ice->gpio_mutex);
660 val = wm_get(ice, reg);
663 mutex_unlock(&ice->gpio_mutex);
666 static void wm_proc_init(struct snd_ice1712 *ice)
669 if (! snd_card_proc_new(ice->card, "wm_codec", &entry)) {
670 snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
678 struct snd_ice1712 *ice = (struct snd_ice1712 *)entry->private_data;
681 mutex_lock(&ice->gpio_mutex);
683 val = spi_read(ice, CS_DEV, reg);
686 val = spi_read(ice, CS_DEV, 0x7f);
688 mutex_unlock(&ice->gpio_mutex);
691 static void cs_proc_init(struct snd_ice1712 *ice)
694 if (! snd_card_proc_new(ice->card, "cs_codec", &entry))
695 snd_info_set_text_ops(entry, ice, cs_proc_regs_read);
699 static int __devinit pontis_add_controls(struct snd_ice1712 *ice)
705 err = snd_ctl_add(ice->card, snd_ctl_new1(&pontis_controls[i], ice));
710 wm_proc_init(ice);
711 cs_proc_init(ice);
720 static int __devinit pontis_init(struct snd_ice1712 *ice)
760 ice->vt1720 = 1;
761 ice->num_total_dacs = 2;
762 ice->num_total_adcs = 2;
765 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
766 if (! ice->akm)
768 ice->akm_codecs = 1;
773 ice->gpio.saved[0] = 0;
777 wm_put(ice, wm_inits[i], wm_inits[i+1]);
780 wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
784 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
787 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
790 spi_write(ice, CS_DEV, cs_inits[i], cs_inits[i+1]);