Lines Matching defs:ice
124 static int __devinit phase22_init(struct snd_ice1712 *ice)
130 switch (ice->eeprom.subvendor) {
133 ice->num_total_dacs = 2;
134 ice->num_total_adcs = 2;
135 ice->vt1720 = 1; /* Envy24HT-S have 16 bit wide GPIO */
143 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
144 ak = ice->akm;
147 ice->akm_codecs = 1;
148 switch (ice->eeprom.subvendor) {
152 &akm_phase22_priv, ice);
161 static int __devinit phase22_add_controls(struct snd_ice1712 *ice)
165 switch (ice->eeprom.subvendor) {
168 err = snd_ice1712_akm4xxx_build_controls(ice);
212 static void phase28_spi_write(struct snd_ice1712 *ice, unsigned int cs,
218 tmp = snd_ice1712_gpio_read(ice);
220 snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RW|PHASE28_SPI_MOSI|
224 snd_ice1712_gpio_write(ice, tmp);
229 snd_ice1712_gpio_write(ice, tmp);
235 snd_ice1712_gpio_write(ice, tmp);
238 snd_ice1712_gpio_write(ice, tmp);
244 snd_ice1712_gpio_write(ice, tmp);
247 snd_ice1712_gpio_write(ice, tmp);
254 static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
257 return ((unsigned short)ice->akm[0].images[reg] << 8) |
258 ice->akm[0].images[reg + 1];
264 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
266 phase28_spi_write(ice, PHASE28_WM_CS, (reg << 9) | (val & 0x1ff), 16);
272 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
274 wm_put_nocache(ice, reg, val);
276 ice->akm[0].images[reg] = val >> 8;
277 ice->akm[0].images[reg + 1] = val;
280 static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index,
291 wm_put(ice, index, nvol);
292 wm_put_nocache(ice, index, 0x180 | nvol);
303 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
305 mutex_lock(&ice->gpio_mutex);
306 ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ?
308 mutex_unlock(&ice->gpio_mutex);
315 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
319 snd_ice1712_save_gpio_status(ice);
320 oval = wm_get(ice, WM_MUTE);
324 wm_put(ice, WM_MUTE, nval);
325 snd_ice1712_restore_gpio_status(ice);
346 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
347 struct phase28_spec *spec = ice->spec;
358 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
359 struct phase28_spec *spec = ice->spec;
362 snd_ice1712_save_gpio_status(ice);
371 for (dac = 0; dac < ice->num_total_dacs; dac += 2)
372 wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
378 snd_ice1712_restore_gpio_status(ice);
382 static int __devinit phase28_init(struct snd_ice1712 *ice)
427 ice->num_total_dacs = 8;
428 ice->num_total_adcs = 2;
433 ice->spec = spec;
436 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
437 ak = ice->akm;
440 ice->akm_codecs = 1;
442 snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for time being */
445 snd_ice1712_save_gpio_status(ice);
446 snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RESET|PHASE28_WM_CS|
449 tmp = snd_ice1712_gpio_read(ice);
451 snd_ice1712_gpio_write(ice, tmp);
454 snd_ice1712_gpio_write(ice, tmp);
457 snd_ice1712_gpio_write(ice, tmp);
462 wm_put(ice, p[0], p[1]);
464 snd_ice1712_restore_gpio_status(ice);
468 for (i = 0; i < ice->num_total_dacs; i++) {
470 wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
493 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
494 struct phase28_spec *spec = ice->spec;
508 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
509 struct phase28_spec *spec = ice->spec;
515 snd_ice1712_save_gpio_status(ice);
525 wm_set_vol(ice, idx, spec->vol[ofs+i],
530 snd_ice1712_restore_gpio_status(ice);
549 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
550 struct phase28_spec *spec = ice->spec;
565 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
566 struct phase28_spec *spec = ice->spec;
572 snd_ice1712_save_gpio_status(ice);
580 wm_set_vol(ice, ofs + i, spec->vol[ofs + i],
585 snd_ice1712_restore_gpio_status(ice);
598 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
599 struct phase28_spec *spec = ice->spec;
611 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
612 struct phase28_spec *spec = ice->spec;
615 snd_ice1712_save_gpio_status(ice);
624 for (dac = 0; dac < ice->num_total_dacs; dac += 2)
625 wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
631 snd_ice1712_restore_gpio_status(ice);
653 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
656 mutex_lock(&ice->gpio_mutex);
657 val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
660 mutex_unlock(&ice->gpio_mutex);
667 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
674 snd_ice1712_save_gpio_status(ice);
676 ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
678 wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
680 wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100);
683 snd_ice1712_restore_gpio_status(ice);
695 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
696 ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) ==
704 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
706 temp = wm_get(ice, WM_DAC_CTRL2);
713 wm_put(ice, WM_DAC_CTRL2, temp);
743 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
744 ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) ==
753 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
755 temp = wm_get(ice, WM_MASTER);
764 wm_put(ice, WM_MASTER, temp);
922 static int __devinit phase28_add_controls(struct snd_ice1712 *ice)
929 err = snd_ctl_add(ice->card,
931 ice));
937 err = snd_ctl_add(ice->card,
938 snd_ctl_new1(&wm_controls[i], ice));