Lines Matching refs:ice
43 static void __devinit snd_ice1712_stdsp24_gpio_write(struct snd_ice1712 *ice, unsigned char byte)
47 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
50 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
53 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
56 static void __devinit snd_ice1712_stdsp24_darear(struct snd_ice1712 *ice, int activate)
58 struct hoontech_spec *spec = ice->spec;
59 mutex_lock(&ice->gpio_mutex);
61 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
62 mutex_unlock(&ice->gpio_mutex);
65 static void __devinit snd_ice1712_stdsp24_mute(struct snd_ice1712 *ice, int activate)
67 struct hoontech_spec *spec = ice->spec;
68 mutex_lock(&ice->gpio_mutex);
70 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
71 mutex_unlock(&ice->gpio_mutex);
74 static void __devinit snd_ice1712_stdsp24_insel(struct snd_ice1712 *ice, int activate)
76 struct hoontech_spec *spec = ice->spec;
77 mutex_lock(&ice->gpio_mutex);
79 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
80 mutex_unlock(&ice->gpio_mutex);
83 static void __devinit snd_ice1712_stdsp24_box_channel(struct snd_ice1712 *ice, int box, int chn, int activate)
85 struct hoontech_spec *spec = ice->spec;
87 mutex_lock(&ice->gpio_mutex);
91 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
97 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
98 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
104 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
105 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
109 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
116 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
123 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
124 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
128 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
130 mutex_unlock(&ice->gpio_mutex);
133 static void __devinit snd_ice1712_stdsp24_box_midi(struct snd_ice1712 *ice, int box, int master)
135 struct hoontech_spec *spec = ice->spec;
137 mutex_lock(&ice->gpio_mutex);
141 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
145 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
146 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
151 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
156 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
158 mutex_unlock(&ice->gpio_mutex);
161 static void __devinit snd_ice1712_stdsp24_midi2(struct snd_ice1712 *ice, int activate)
163 struct hoontech_spec *spec = ice->spec;
164 mutex_lock(&ice->gpio_mutex);
166 snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
167 mutex_unlock(&ice->gpio_mutex);
170 static int __devinit snd_ice1712_hoontech_init(struct snd_ice1712 *ice)
175 ice->num_total_dacs = 8;
176 ice->num_total_adcs = 8;
181 ice->spec = spec;
233 snd_ice1712_stdsp24_darear(ice,
235 snd_ice1712_stdsp24_mute(ice,
237 snd_ice1712_stdsp24_insel(ice,
241 snd_ice1712_stdsp24_midi2(ice, 1);
243 snd_ice1712_stdsp24_box_channel(ice, box, chn,
246 snd_ice1712_stdsp24_box_midi(ice, box, 1);
259 struct snd_ice1712 *ice = ak->private_data[0];
261 snd_ice1712_save_gpio_status(ice);
265 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
266 ice->gpio.direction | tmp);
267 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
270 static int __devinit snd_ice1712_value_init(struct snd_ice1712 *ice)
297 ice->num_total_dacs = 2;
300 ice->num_total_adcs = 2;
303 ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
306 ice->akm_codecs = 1;
308 err = snd_ice1712_akm4xxx_init(ak, &akm_stdsp24_mv, &akm_stdsp24_mv_priv, ice);
313 err = snd_ice1712_akm4xxx_build_controls(ice);
320 static int __devinit snd_ice1712_ez8_init(struct snd_ice1712 *ice)
322 ice->gpio.write_mask = ice->eeprom.gpiomask;
323 ice->gpio.direction = ice->eeprom.gpiodir;
324 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask);
325 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir);
326 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate);