Lines Matching refs:hw
36 struct hw hw;
43 static u32 hw_read_20kx(struct hw *hw, u32 reg);
44 static void hw_write_20kx(struct hw *hw, u32 reg, u32 data);
367 static int src_commit_write(struct hw *hw, unsigned int idx, void *blk)
375 hw_write_20kx(hw, SRC_UPZ+idx*0x100+i*0x4, 0);
378 hw_write_20kx(hw, SRC_DN0Z+idx*0x100+i*0x4, 0);
381 hw_write_20kx(hw, SRC_DN1Z+idx*0x100+i*0x4, 0);
391 hw_write_20kx(hw, MIXER_PRING_LO_HI+4*pm_idx, ctl->mpr);
392 hw_write_20kx(hw, MIXER_PMOPLO+8*pm_idx, 0x3);
393 hw_write_20kx(hw, MIXER_PMOPHI+8*pm_idx, 0x0);
397 hw_write_20kx(hw, SRC_SA+idx*0x100, ctl->sa);
401 hw_write_20kx(hw, SRC_LA+idx*0x100, ctl->la);
405 hw_write_20kx(hw, SRC_CA+idx*0x100, ctl->ca);
410 hw_write_20kx(hw, SRC_CF+idx*0x100, 0x0);
413 hw_write_20kx(hw, SRC_CCR+idx*0x100, ctl->ccr);
417 hw_write_20kx(hw, SRC_CTL+idx*0x100, ctl->ctl);
424 static int src_get_ca(struct hw *hw, unsigned int idx, void *blk)
428 ctl->ca = hw_read_20kx(hw, SRC_CA+idx*0x100);
466 static int src_mgr_commit_write(struct hw *hw, void *blk)
474 ret = hw_read_20kx(hw, SRC_ENBSTAT);
476 hw_write_20kx(hw, SRC_ENBSA, ctl->enbsa);
481 hw_write_20kx(hw, SRC_ENB+(i*0x100), ctl->enb[i]);
565 static int srcimp_mgr_commit_write(struct hw *hw, void *blk)
570 hw_write_20kx(hw, SRC_IMAP+ctl->srcimap.idx*0x100,
673 static int amixer_commit_write(struct hw *hw, unsigned int idx, void *blk)
678 hw_write_20kx(hw, MIXER_AMOPLO+idx*8, ctl->amoplo);
680 hw_write_20kx(hw, MIXER_AMOPHI+idx*8, ctl->amophi);
876 static int dai_commit_write(struct hw *hw, unsigned int idx, void *blk)
881 hw_write_20kx(hw, AUDIO_IO_RX_SRT_CTL+0x40*idx, ctl->srt);
916 static int dao_commit_write(struct hw *hw, unsigned int idx, void *blk)
923 hw_write_20kx(hw, AUDIO_IO_TX_CSTAT_L+0x40*idx,
1059 static int daio_mgr_commit_write(struct hw *hw, void *blk)
1068 hw_write_20kx(hw, (AUDIO_IO_TX_CTL+(0x40*i)), data);
1074 hw_write_20kx(hw, (AUDIO_IO_RX_CTL+(0x40*i)), data);
1080 hw_write_20kx(hw, AUDIO_IO_AIM+ctl->daoimap.idx*4,
1088 static int daio_mgr_get_ctrl_blk(struct hw *hw, void **rblk)
1099 blk->txctl[i] = hw_read_20kx(hw, AUDIO_IO_TX_CTL+(0x40*i));
1100 blk->rxctl[i] = hw_read_20kx(hw, AUDIO_IO_RX_CTL+(0x40*i));
1116 static int set_timer_irq(struct hw *hw, int enable)
1118 hw_write_20kx(hw, GIE, enable ? IT_INT : 0);
1122 static int set_timer_tick(struct hw *hw, unsigned int ticks)
1126 hw_write_20kx(hw, TIMR, ticks);
1130 static unsigned int get_wc(struct hw *hw)
1132 return hw_read_20kx(hw, WC);
1154 static int hw_daio_init(struct hw *hw, const struct daio_conf *info)
1162 hw_write_20kx(hw, AUDIO_IO_MCLK, 0x01010101);
1163 hw_write_20kx(hw, AUDIO_IO_TX_BLRCLK, 0x01010101);
1164 hw_write_20kx(hw, AUDIO_IO_RX_BLRCLK, 0);
1166 hw_write_20kx(hw, AUDIO_IO_MCLK, 0x11111111);
1176 hw_write_20kx(hw, AUDIO_IO_TX_BLRCLK, 0x11111111);
1177 hw_write_20kx(hw, AUDIO_IO_RX_BLRCLK, 0);
1191 hw_write_20kx(hw, (AUDIO_IO_TX_CTL+(0x40*i)), data);
1192 hw_write_20kx(hw, (AUDIO_IO_RX_CTL+(0x40*i)), data);
1204 hw_write_20kx(hw, AUDIO_IO_TX_CSTAT_L+(0x40*i),
1207 hw_write_20kx(hw, AUDIO_IO_TX_CSTAT_H+(0x40*i), 0x0B);
1211 hw_write_20kx(hw, AUDIO_IO_RX_CTL+(0x40*i), data);
1216 hw_write_20kx(hw, AUDIO_IO_TX_CTL+(0x40*i), data);
1224 static int hw_trn_init(struct hw *hw, const struct trn_conf *info)
1244 hw_write_20kx(hw, VMEM_PTPAL+(16*i), ptp_phys_low);
1245 hw_write_20kx(hw, VMEM_PTPAH+(16*i), ptp_phys_high);
1248 hw_write_20kx(hw, VMEM_CTL, vmctl);
1250 hw_write_20kx(hw, TRANSPORT_CTL, 0x03);
1251 hw_write_20kx(hw, TRANSPORT_INT, 0x200c01);
1253 data = hw_read_20kx(hw, TRANSPORT_ENB);
1254 hw_write_20kx(hw, TRANSPORT_ENB, (data | 0x03));
1293 static int hw_pll_init(struct hw *hw, unsigned int rsr)
1301 hw_write_20kx(hw, PLL_ENB, pllenb);
1304 hw_write_20kx(hw, PLL_CTL, pllctl);
1306 pllctl = hw_read_20kx(hw, PLL_CTL);
1315 hw_write_20kx(hw, PLL_CTL, pllctl);
1318 pllstat = hw_read_20kx(hw, PLL_STAT);
1348 static int hw_auto_init(struct hw *hw)
1353 gctl = hw_read_20kx(hw, GLOBAL_CNTL_GCTL);
1355 hw_write_20kx(hw, GLOBAL_CNTL_GCTL, gctl);
1357 hw_write_20kx(hw, GLOBAL_CNTL_GCTL, gctl);
1360 gctl = hw_read_20kx(hw, GLOBAL_CNTL_GCTL);
1433 static int hw20k2_i2c_unlock_full_access(struct hw *hw)
1438 hw_write_20kx(hw, I2C_IF_WLOCK,
1440 hw_write_20kx(hw, I2C_IF_WLOCK,
1443 if (hw_read_20kx(hw, I2C_IF_WLOCK) == STATE_UNLOCKED)
1449 static int hw20k2_i2c_lock_chip(struct hw *hw)
1452 hw_write_20kx(hw, I2C_IF_WLOCK, STATE_LOCKED);
1453 hw_write_20kx(hw, I2C_IF_WLOCK, STATE_LOCKED);
1454 if (hw_read_20kx(hw, I2C_IF_WLOCK) == STATE_LOCKED)
1460 static int hw20k2_i2c_init(struct hw *hw, u8 dev_id, u8 addr_size, u8 data_size)
1462 struct hw20k2 *hw20k2 = (struct hw20k2 *)hw;
1467 err = hw20k2_i2c_unlock_full_access(hw);
1478 hw_write_20kx(hw, I2C_IF_ADDRESS, i2c_addr);
1480 i2c_status = hw_read_20kx(hw, I2C_IF_STATUS);
1484 hw_write_20kx(hw, I2C_IF_STATUS, i2c_status);
1489 static int hw20k2_i2c_uninit(struct hw *hw)
1497 hw_write_20kx(hw, I2C_IF_ADDRESS, i2c_addr);
1499 i2c_status = hw_read_20kx(hw, I2C_IF_STATUS);
1503 hw_write_20kx(hw, I2C_IF_STATUS, i2c_status);
1505 return hw20k2_i2c_lock_chip(hw);
1508 static int hw20k2_i2c_wait_data_ready(struct hw *hw)
1514 ret = hw_read_20kx(hw, I2C_IF_STATUS);
1520 static int hw20k2_i2c_read(struct hw *hw, u16 addr, u32 *datap)
1522 struct hw20k2 *hw20k2 = (struct hw20k2 *)hw;
1525 i2c_status = hw_read_20kx(hw, I2C_IF_STATUS);
1528 hw_write_20kx(hw, I2C_IF_STATUS, i2c_status);
1529 if (!hw20k2_i2c_wait_data_ready(hw))
1532 hw_write_20kx(hw, I2C_IF_WDATA, addr);
1533 if (!hw20k2_i2c_wait_data_ready(hw))
1537 hw_write_20kx(hw, I2C_IF_RDATA, 0);
1538 if (!hw20k2_i2c_wait_data_ready(hw))
1541 *datap = hw_read_20kx(hw, I2C_IF_RDATA);
1546 static int hw20k2_i2c_write(struct hw *hw, u16 addr, u32 data)
1548 struct hw20k2 *hw20k2 = (struct hw20k2 *)hw;
1552 i2c_status = hw_read_20kx(hw, I2C_IF_STATUS);
1558 hw_write_20kx(hw, I2C_IF_STATUS, i2c_status);
1559 hw20k2_i2c_wait_data_ready(hw);
1561 hw_write_20kx(hw, I2C_IF_WDATA, 0);
1562 hw20k2_i2c_wait_data_ready(hw);
1565 hw_write_20kx(hw, I2C_IF_WDATA, i2c_data);
1566 hw20k2_i2c_wait_data_ready(hw);
1571 static int hw_dac_init(struct hw *hw, const struct dac_conf *info)
1598 data = hw_read_20kx(hw, GPIO_CTRL);
1600 hw_write_20kx(hw, GPIO_CTRL, data);
1602 err = hw20k2_i2c_init(hw, 0x18, 1, 1);
1609 data = hw_read_20kx(hw, GPIO_DATA);
1612 hw_write_20kx(hw, GPIO_DATA, data);
1615 hw_write_20kx(hw, GPIO_DATA, data);
1620 hw_write_20kx(hw, GPIO_DATA, data);
1623 hw_write_20kx(hw, GPIO_DATA, data);
1626 if (hw20k2_i2c_read(hw, CS4382_MC1, &cs_read.mode_control_1))
1629 if (hw20k2_i2c_read(hw, CS4382_MC2, &cs_read.mode_control_2))
1632 if (hw20k2_i2c_read(hw, CS4382_MC3, &cs_read.mode_control_3))
1635 if (hw20k2_i2c_read(hw, CS4382_FC, &cs_read.filter_control))
1638 if (hw20k2_i2c_read(hw, CS4382_IC, &cs_read.invert_control))
1641 if (hw20k2_i2c_read(hw, CS4382_XC1, &cs_read.mix_control_P1))
1644 if (hw20k2_i2c_read(hw, CS4382_VCA1, &cs_read.vol_control_A1))
1647 if (hw20k2_i2c_read(hw, CS4382_VCB1, &cs_read.vol_control_B1))
1650 if (hw20k2_i2c_read(hw, CS4382_XC2, &cs_read.mix_control_P2))
1653 if (hw20k2_i2c_read(hw, CS4382_VCA2, &cs_read.vol_control_A2))
1656 if (hw20k2_i2c_read(hw, CS4382_VCB2, &cs_read.vol_control_B2))
1659 if (hw20k2_i2c_read(hw, CS4382_XC3, &cs_read.mix_control_P3))
1662 if (hw20k2_i2c_read(hw, CS4382_VCA3, &cs_read.vol_control_A3))
1665 if (hw20k2_i2c_read(hw, CS4382_VCB3, &cs_read.vol_control_B3))
1668 if (hw20k2_i2c_read(hw, CS4382_XC4, &cs_read.mix_control_P4))
1671 if (hw20k2_i2c_read(hw, CS4382_VCA4, &cs_read.vol_control_A4))
1674 if (hw20k2_i2c_read(hw, CS4382_VCB4, &cs_read.vol_control_B4))
1688 hw20k2_i2c_write(hw, CS4382_MC1, 0x80);
1689 hw20k2_i2c_write(hw, CS4382_MC2, 0x10);
1691 hw20k2_i2c_write(hw, CS4382_XC1, 0x24);
1692 hw20k2_i2c_write(hw, CS4382_XC2, 0x24);
1693 hw20k2_i2c_write(hw, CS4382_XC3, 0x24);
1694 hw20k2_i2c_write(hw, CS4382_XC4, 0x24);
1696 hw20k2_i2c_write(hw, CS4382_XC1, 0x25);
1697 hw20k2_i2c_write(hw, CS4382_XC2, 0x25);
1698 hw20k2_i2c_write(hw, CS4382_XC3, 0x25);
1699 hw20k2_i2c_write(hw, CS4382_XC4, 0x25);
1701 hw20k2_i2c_write(hw, CS4382_XC1, 0x26);
1702 hw20k2_i2c_write(hw, CS4382_XC2, 0x26);
1703 hw20k2_i2c_write(hw, CS4382_XC3, 0x26);
1704 hw20k2_i2c_write(hw, CS4382_XC4, 0x26);
1710 hw20k2_i2c_uninit(hw);
1725 static int hw_is_adc_input_selected(struct hw *hw, enum ADCSRC type)
1729 data = hw_read_20kx(hw, GPIO_DATA);
1743 static int hw_adc_input_select(struct hw *hw, enum ADCSRC type)
1747 data = hw_read_20kx(hw, GPIO_DATA);
1751 hw_write_20kx(hw, GPIO_DATA, data);
1752 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_ADCMC, 0x101),
1754 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCL, 0xE7),
1756 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCR, 0xE7),
1761 hw_write_20kx(hw, GPIO_DATA, data);
1762 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_ADCMC, 0x102),
1764 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCL, 0xCF),
1766 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCR, 0xCF),
1776 static int hw_adc_init(struct hw *hw, const struct adc_conf *info)
1782 data = hw_read_20kx(hw, GPIO_CTRL);
1784 hw_write_20kx(hw, GPIO_CTRL, data);
1787 err = hw20k2_i2c_init(hw, 0x1A, 1, 1);
1794 data = hw_read_20kx(hw, GPIO_DATA);
1798 hw_write_20kx(hw, GPIO_DATA, data);
1803 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_MMC, 0x02),
1806 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_MMC, 0x0A),
1816 ctl = hw_read_20kx(hw, GPIO_CTRL);
1818 hw_write_20kx(hw, GPIO_CTRL, ctl);
1821 data = hw_read_20kx(hw, GPIO_DATA);
1826 hw_write_20kx(hw, GPIO_DATA, data);
1828 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_ADCMC, 0x101),
1830 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCL, 0xE7),
1832 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCR, 0xE7),
1837 hw_write_20kx(hw, GPIO_DATA, data);
1840 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_ADCMC, 0x102),
1842 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCL, 0xCF),
1844 hw20k2_i2c_write(hw, MAKE_WM8775_ADDR(WM8775_AADCR, 0xCF),
1855 hw20k2_i2c_uninit(hw);
1859 static int hw_have_digit_io_switch(struct hw *hw)
1866 struct hw *hw = dev_id;
1869 status = hw_read_20kx(hw, GIP);
1873 if (hw->irq_callback)
1874 hw->irq_callback(hw->irq_callback_data, status);
1876 hw_write_20kx(hw, GIP, status);
1880 static int hw_card_start(struct hw *hw)
1883 struct pci_dev *pci = hw->pci;
1899 if (!hw->io_base) {
1904 hw->io_base = pci_resource_start(hw->pci, 2);
1905 hw->mem_base = (unsigned long)ioremap(hw->io_base,
1906 pci_resource_len(hw->pci, 2));
1907 if (!hw->mem_base) {
1914 gctl = hw_read_20kx(hw, GLOBAL_CNTL_GCTL);
1916 hw_write_20kx(hw, GLOBAL_CNTL_GCTL, gctl);
1918 if (hw->irq < 0) {
1920 "ctxfi", hw);
1925 hw->irq = pci->irq;
1933 iounmap((void *)hw->mem_base);
1934 hw->mem_base = (unsigned long)NULL;*/
1937 hw->io_base = 0;
1943 static int hw_card_stop(struct hw *hw)
1948 hw_write_20kx(hw, TRANSPORT_CTL, 0x00);
1951 data = hw_read_20kx(hw, PLL_ENB);
1952 hw_write_20kx(hw, PLL_ENB, (data & (~0x07)));
1958 static int hw_card_shutdown(struct hw *hw)
1960 if (hw->irq >= 0)
1961 free_irq(hw->irq, hw);
1963 hw->irq = -1;
1965 if (hw->mem_base)
1966 iounmap((void *)hw->mem_base);
1968 hw->mem_base = (unsigned long)NULL;
1970 if (hw->io_base)
1971 pci_release_regions(hw->pci);
1973 hw->io_base = 0;
1975 pci_disable_device(hw->pci);
1980 static int hw_card_init(struct hw *hw, struct card_conf *info)
1992 err = hw_card_start(hw);
1997 err = hw_pll_init(hw, info->rsr);
2002 err = hw_auto_init(hw);
2006 gctl = hw_read_20kx(hw, GLOBAL_CNTL_GCTL);
2011 hw_write_20kx(hw, GLOBAL_CNTL_GCTL, gctl);
2014 hw_write_20kx(hw, GIE, 0);
2016 hw_write_20kx(hw, SRC_IP, 0);
2020 /*hw_write_20kx(hw, GPIO_CTRL, 0x7F07);*/
2022 /*hw_write_20kx(hw, GPIO_CTRL, 0xFF07);*/
2023 hw_write_20kx(hw, GPIO_CTRL, 0xD802);
2026 hw_write_20kx(hw, MIXER_AR_ENABLE, 0x01);
2029 err = hw_trn_init(hw, &trn_info);
2034 err = hw_daio_init(hw, &daio_info);
2039 err = hw_dac_init(hw, &dac_info);
2046 err = hw_adc_init(hw, &adc_info);
2050 data = hw_read_20kx(hw, SRC_MCTL);
2052 hw_write_20kx(hw, SRC_MCTL, data);
2058 static int hw_suspend(struct hw *hw, pm_message_t state)
2060 struct pci_dev *pci = hw->pci;
2062 hw_card_stop(hw);
2071 static int hw_resume(struct hw *hw, struct card_conf *info)
2073 struct pci_dev *pci = hw->pci;
2079 return hw_card_init(hw, info);
2083 static u32 hw_read_20kx(struct hw *hw, u32 reg)
2085 return readl((void *)(hw->mem_base + reg));
2088 static void hw_write_20kx(struct hw *hw, u32 reg, u32 data)
2090 writel(data, (void *)(hw->mem_base + reg));
2093 static struct hw ct20k2_preset __devinitdata = {
2197 int __devinit create_20k2_hw_obj(struct hw **rhw)
2206 hw20k2->hw = ct20k2_preset;
2207 *rhw = &hw20k2->hw;
2212 int destroy_20k2_hw_obj(struct hw *hw)
2214 if (hw->io_base)
2215 hw_card_shutdown(hw);
2217 kfree(hw);