Lines Matching refs:dw2040_HPICSR
143 __iomem u32 *dw2040_HPICSR;
528 phw->dw2040_HPICSR = pao->pci.ap_mem_base[0];
530 HPI_DEBUG_LOG(VERBOSE, "csr %p, dsp %p\n", phw->dw2040_HPICSR,
704 iowrite32(dw2040_reset, phw->dw2040_HPICSR + HPI_RESET);
711 delay = ioread32(phw->dw2040_HPICSR + HPI_RESET);
719 iowrite32(0x00000003, phw->dw2040_HPICSR + HPI_DATA_WIDTH);
723 iowrite32(0x60000000, phw->dw2040_HPICSR + INTERRUPT_MASK_SET);
729 iowrite32(dw2040_reset, phw->dw2040_HPICSR + HPI_RESET);
736 iowrite32(dw2040_reset, phw->dw2040_HPICSR + HPI_RESET);
738 iowrite32(dw2040_reset, phw->dw2040_HPICSR + HPI_RESET);
742 iowrite32(dw2040_reset, phw->dw2040_HPICSR + HPI_RESET);
745 delay = ioread32(phw->dw2040_HPICSR + HPI_RESET);
785 delay = ioread32(phw->dw2040_HPICSR +
797 delay = ioread32(phw->dw2040_HPICSR +
803 delay = ioread32(phw->dw2040_HPICSR +
930 delay = ioread32(phw->dw2040_HPICSR + HPI_RESET);
1075 delay = ioread32(phw->dw2040_HPICSR + HPI_RESET);
1615 hPI_error = ioread32(phw->dw2040_HPICSR + HPI_ERROR_REPORT);
1618 iowrite32(0L, phw->dw2040_HPICSR + HPI_ERROR_REPORT);