Lines Matching defs:gus
33 #include <sound/gus.h>
119 struct snd_gus_card *gus;
202 struct snd_gus_card * gus, int dev,
215 if (gus->gf1.port == 0x250) {
244 struct snd_gus_card * gus,
255 snd_gf1_i_write8(gus, SNDRV_GF1_GB_RESET, 0); /* reset GF1 */
256 if (((d = snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET)) & 0x07) != 0) {
257 snd_printdd("[0x%lx] check 1 failed - 0x%x\n", gus->gf1.port, d);
261 snd_gf1_i_write8(gus, SNDRV_GF1_GB_RESET, 1); /* release reset */
263 if (((d = snd_gf1_i_look8(gus, SNDRV_GF1_GB_RESET)) & 0x07) != 1) {
264 snd_printdd("[0x%lx] check 2 failed - 0x%x\n", gus->gf1.port, d);
267 spin_lock_irqsave(&gus->reg_lock, flags);
268 rev1 = snd_gf1_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER);
269 snd_gf1_write8(gus, SNDRV_GF1_GB_VERSION_NUMBER, ~rev1);
270 rev2 = snd_gf1_look8(gus, SNDRV_GF1_GB_VERSION_NUMBER);
271 snd_gf1_write8(gus, SNDRV_GF1_GB_VERSION_NUMBER, rev1);
272 spin_unlock_irqrestore(&gus->reg_lock, flags);
273 snd_printdd("[0x%lx] InterWave check - rev1=0x%x, rev2=0x%x\n", gus->gf1.port, rev1, rev2);
276 snd_printdd("[0x%lx] InterWave check - passed\n", gus->gf1.port);
277 gus->interwave = 1;
278 strcpy(gus->card->shortname, "AMD InterWave");
279 gus->revision = rev1 >> 4;
283 return snd_interwave_detect_stb(iwcard, gus, dev, rbus);
286 snd_printdd("[0x%lx] InterWave check - failed\n", gus->gf1.port);
300 snd_gus_interrupt(irq, iwcard->gus);
312 static void __devinit snd_interwave_reset(struct snd_gus_card * gus)
314 snd_gf1_write8(gus, SNDRV_GF1_GB_RESET, 0x00);
316 snd_gf1_write8(gus, SNDRV_GF1_GB_RESET, 0x01);
320 static void __devinit snd_interwave_bank_sizes(struct snd_gus_card * gus, int *sizes)
332 snd_gf1_poke(gus, local, d);
333 snd_gf1_poke(gus, local + 1, d + 1);
334 if (snd_gf1_peek(gus, local) != d ||
335 snd_gf1_peek(gus, local + 1) != d + 1 ||
336 snd_gf1_peek(gus, idx << 22) != 0x55)
359 static void __devinit snd_interwave_detect_memory(struct snd_gus_card * gus)
375 snd_interwave_reset(gus);
376 snd_gf1_write8(gus, SNDRV_GF1_GB_GLOBAL_MODE, snd_gf1_read8(gus, SNDRV_GF1_GB_GLOBAL_MODE) | 0x01); /* enhanced mode */
377 snd_gf1_write8(gus, SNDRV_GF1_GB_MEMORY_CONTROL, 0x01); /* DRAM I/O cycles selected */
378 snd_gf1_write16(gus, SNDRV_GF1_GW_MEMORY_CONFIG, (snd_gf1_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG) & 0xff10) | 0x004c);
381 snd_gf1_poke(gus, 0, 0x55);
382 snd_gf1_poke(gus, 1, 0xaa);
383 if (snd_gf1_peek(gus, 0) == 0x55 && snd_gf1_peek(gus, 1) == 0xaa)
385 snd_interwave_bank_sizes(gus, psizes);
390 snd_gf1_write16(gus, SNDRV_GF1_GW_MEMORY_CONFIG, (snd_gf1_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG) & 0xfff0) | i);
391 snd_interwave_bank_sizes(gus, psizes);
394 if (i >= ARRAY_SIZE(lmc) && !gus->gf1.enh_mode)
395 snd_gf1_write16(gus, SNDRV_GF1_GW_MEMORY_CONFIG, (snd_gf1_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG) & 0xfff0) | 2);
397 gus->gf1.mem_alloc.banks_8[i].address =
398 gus->gf1.mem_alloc.banks_16[i].address = i << 22;
399 gus->gf1.mem_alloc.banks_8[i].size =
400 gus->gf1.mem_alloc.banks_16[i].size = psizes[i] << 18;
405 gus->gf1.memory = pages;
407 snd_gf1_write8(gus, SNDRV_GF1_GB_MEMORY_CONTROL, 0x03); /* select ROM */
408 snd_gf1_write16(gus, SNDRV_GF1_GW_MEMORY_CONFIG, (snd_gf1_look16(gus, SNDRV_GF1_GW_MEMORY_CONFIG) & 0xff1f) | (4 << 5));
409 gus->gf1.rom_banks = 0;
410 gus->gf1.rom_memory = 0;
413 iwave[i] = snd_gf1_peek(gus, bank_pos + i);
423 csum += snd_gf1_peek(gus, bank_pos + i);
429 gus->gf1.rom_banks++;
430 gus->gf1.rom_present |= 1 << (bank_pos >> 22);
431 gus->gf1.rom_memory = snd_gf1_peek(gus, bank_pos + 40) |
432 (snd_gf1_peek(gus, bank_pos + 41) << 8) |
433 (snd_gf1_peek(gus, bank_pos + 42) << 16) |
434 (snd_gf1_peek(gus, bank_pos + 43) << 24);
436 snd_gf1_write8(gus, SNDRV_GF1_GB_MEMORY_CONTROL, 0x00); /* select RAM */
438 if (!gus->gf1.enh_mode)
439 snd_interwave_reset(gus);
442 static void __devinit snd_interwave_init(int dev, struct snd_gus_card * gus)
447 spin_lock_irqsave(&gus->reg_lock, flags);
448 snd_gf1_write8(gus, SNDRV_GF1_GB_SOUND_BLASTER_CONTROL, 0x00);
449 snd_gf1_write8(gus, SNDRV_GF1_GB_COMPATIBILITY, 0x1f);
450 snd_gf1_write8(gus, SNDRV_GF1_GB_DECODE_CONTROL, 0x49);
451 snd_gf1_write8(gus, SNDRV_GF1_GB_VERSION_NUMBER, 0x11);
452 snd_gf1_write8(gus, SNDRV_GF1_GB_MPU401_CONTROL_A, 0x00);
453 snd_gf1_write8(gus, SNDRV_GF1_GB_MPU401_CONTROL_B, 0x30);
454 snd_gf1_write8(gus, SNDRV_GF1_GB_EMULATION_IRQ, 0x00);
455 spin_unlock_irqrestore(&gus->reg_lock, flags);
456 gus->equal_irq = 1;
457 gus->codec_flag = 1;
458 gus->interwave = 1;
459 gus->max_flag = 1;
460 gus->joystick_dac = joystick_dac[dev];
607 struct snd_gus_card *gus;
623 pcm_channels[dev], effect[dev], &gus)) < 0)
626 if ((err = snd_interwave_detect(iwcard, gus, dev
633 iwcard->gus_status_reg = gus->gf1.reg_irqstat;
634 iwcard->pcm_status_reg = gus->gf1.port + 0x10c + 2;
636 snd_interwave_init(dev, gus);
637 snd_interwave_detect_memory(gus);
638 if ((err = snd_gus_initialize(gus)) < 0)
649 gus->gf1.port + 0x10c, -1, xirq,
663 sprintf(pcm->name + strlen(pcm->name), " rev %c", gus->revision + 'A');
675 err = snd_gf1_pcm_new(gus, 1, 1, NULL);
703 gus->uart_enable = midi[dev];
704 if ((err = snd_gf1_rawmidi_new(gus, 0, NULL)) < 0)
709 if (gus->gf1.rom_banks == 1 && gus->gf1.rom_present == 8)
718 gus->gf1.port,
729 iwcard->gus = gus;