Lines Matching refs:snd_opl4_write
38 void snd_opl4_write(struct snd_opl4 *opl4, u8 reg, u8 value)
47 EXPORT_SYMBOL(snd_opl4_write);
68 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg | OPL4_MODE_BIT);
70 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_HIGH, offset >> 16);
71 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_MID, offset >> 8);
72 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_LOW, offset);
79 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg);
94 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg | OPL4_MODE_BIT);
96 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_HIGH, offset >> 16);
97 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_MID, offset >> 8);
98 snd_opl4_write(opl4, OPL4_REG_MEMORY_ADDRESS_LOW, offset);
105 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, memcfg);
141 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_FM, 0x00);
142 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_PCM, 0xff);
149 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_FM, 0x3f);
150 snd_opl4_write(opl4, OPL4_REG_MIX_CONTROL_PCM, 0x3f);
151 snd_opl4_write(opl4, OPL4_REG_MEMORY_CONFIGURATION, 0x00);