Lines Matching refs:K0
116 #define K0 26
139 * Save K0 into the debug scratch register
141 uasm_i_dmtc0(&p, K0, C0_DESAVE);
143 uasm_i_mfc0(&p, K0, C0_STATUS);
145 uasm_il_bbit0(&p, &r, K0, ilog2(ST0_NMI), label_enter_bootloader);
148 uasm_i_ori(&p, K0, K0, ST0_UX | ST0_SX | ST0_KX);
149 uasm_i_mtc0(&p, K0, C0_STATUS);
152 uasm_i_mfc0(&p, K0, C0_EBASE);
153 /* Coreid number in K0 */
154 uasm_i_andi(&p, K0, K0, 0xf);
156 uasm_i_dsll_safe(&p, K0, K0, 3 + 16);
157 uasm_i_ori(&p, K0, K0, 0x8001);
158 uasm_i_dsll_safe(&p, K0, K0, 16);
159 uasm_i_ori(&p, K0, K0, 0x0700);
160 uasm_i_drotr_safe(&p, K0, K0, 32);
165 * Now ld K0, CVMX_CIU_WDOGX(coreid)
167 uasm_i_ld(&p, K0, 0x500, K0);
172 uasm_il_bbit0(&p, &r, K0, 1, label_enter_bootloader);
179 /* Use K0 to do a read/modify/write of CVMMEMCTL */
180 uasm_i_dmfc0(&p, K0, C0_CVMMEMCTL);
182 uasm_i_dins(&p, K0, 0, 0, 6);
184 uasm_i_ori(&p, K0, K0, 0x1c0 | 54);
186 uasm_i_dmtc0(&p, K0, C0_CVMMEMCTL);
189 UASM_i_LA(&p, K0, (long)octeon_wdt_nmi_stage2);
190 uasm_i_jr(&p, K0);
191 uasm_i_dmfc0(&p, K0, C0_DESAVE);
195 /* Jump to the bootloader and restore K0 */
196 UASM_i_LA(&p, K0, (long)octeon_bootloader_entry_addr);
197 uasm_i_jr(&p, K0);
198 uasm_i_dmfc0(&p, K0, C0_DESAVE);