Lines Matching refs:drvdata
150 static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 offset,
153 if (drvdata->flags & PLB_ACCESS_FLAG)
154 out_be32(drvdata->regs + (offset << 2), val);
156 dcr_write(drvdata->dcr_host, offset, val);
191 struct xilinxfb_drvdata *drvdata = to_xilinxfb_drvdata(fbi);
196 xilinx_fb_out_be32(drvdata, REG_CTRL, drvdata->reg_ctrl_default);
204 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
227 struct xilinxfb_drvdata *drvdata,
234 if (drvdata->flags & PLB_ACCESS_FLAG) {
246 drvdata->regs_phys = physaddr;
247 drvdata->regs = ioremap(physaddr, 8);
248 if (!drvdata->regs) {
258 drvdata->fb_phys = pdata->fb_phys;
259 drvdata->fb_virt = ioremap(pdata->fb_phys, fbsize);
261 drvdata->fb_alloced = 1;
262 drvdata->fb_virt = dma_alloc_coherent(dev, PAGE_ALIGN(fbsize),
263 &drvdata->fb_phys, GFP_KERNEL);
266 if (!drvdata->fb_virt) {
269 if (drvdata->flags & PLB_ACCESS_FLAG)
276 memset_io((void __iomem *)drvdata->fb_virt, 0, fbsize);
279 xilinx_fb_out_be32(drvdata, REG_FB_ADDR, drvdata->fb_phys);
282 drvdata->reg_ctrl_default = REG_CTRL_ENABLE;
284 drvdata->reg_ctrl_default |= REG_CTRL_ROTATE;
285 xilinx_fb_out_be32(drvdata, REG_CTRL,
286 drvdata->reg_ctrl_default);
289 drvdata->info.device = dev;
290 drvdata->info.screen_base = (void __iomem *)drvdata->fb_virt;
291 drvdata->info.fbops = &xilinxfb_ops;
292 drvdata->info.fix = xilinx_fb_fix;
293 drvdata->info.fix.smem_start = drvdata->fb_phys;
294 drvdata->info.fix.smem_len = fbsize;
295 drvdata->info.fix.line_length = pdata->xvirt * BYTES_PER_PIXEL;
297 drvdata->info.pseudo_palette = drvdata->pseudo_palette;
298 drvdata->info.flags = FBINFO_DEFAULT;
299 drvdata->info.var = xilinx_fb_var;
300 drvdata->info.var.height = pdata->screen_height_mm;
301 drvdata->info.var.width = pdata->screen_width_mm;
302 drvdata->info.var.xres = pdata->xres;
303 drvdata->info.var.yres = pdata->yres;
304 drvdata->info.var.xres_virtual = pdata->xvirt;
305 drvdata->info.var.yres_virtual = pdata->yvirt;
308 rc = fb_alloc_cmap(&drvdata->info.cmap, PALETTE_ENTRIES_NO, 0);
316 rc = register_framebuffer(&drvdata->info);
322 if (drvdata->flags & PLB_ACCESS_FLAG) {
325 drvdata->regs);
329 (unsigned long long)drvdata->fb_phys, drvdata->fb_virt, fbsize);
334 fb_dealloc_cmap(&drvdata->info.cmap);
337 if (drvdata->fb_alloced)
338 dma_free_coherent(dev, PAGE_ALIGN(fbsize), drvdata->fb_virt,
339 drvdata->fb_phys);
341 iounmap(drvdata->fb_virt);
344 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
347 if (drvdata->flags & PLB_ACCESS_FLAG)
348 iounmap(drvdata->regs);
351 if (drvdata->flags & PLB_ACCESS_FLAG)
355 kfree(drvdata);
363 struct xilinxfb_drvdata *drvdata = dev_get_drvdata(dev);
366 xilinx_fb_blank(VESA_POWERDOWN, &drvdata->info);
369 unregister_framebuffer(&drvdata->info);
371 fb_dealloc_cmap(&drvdata->info.cmap);
373 if (drvdata->fb_alloced)
374 dma_free_coherent(dev, PAGE_ALIGN(drvdata->info.fix.smem_len),
375 drvdata->fb_virt, drvdata->fb_phys);
377 iounmap(drvdata->fb_virt);
380 xilinx_fb_out_be32(drvdata, REG_CTRL, 0);
383 if (drvdata->flags & PLB_ACCESS_FLAG) {
384 iounmap(drvdata->regs);
385 release_mem_region(drvdata->regs_phys, 8);
387 dcr_unmap(drvdata->dcr_host, drvdata->dcr_len);
389 kfree(drvdata);
408 struct xilinxfb_drvdata *drvdata;
416 drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL);
417 if (!drvdata) {
434 drvdata->flags |= PLB_ACCESS_FLAG;
443 drvdata->dcr_len = dcr_resource_len(op->dev.of_node, 0);
444 drvdata->dcr_host = dcr_map(op->dev.of_node, start, drvdata->dcr_len);
445 if (!DCR_MAP_OK(drvdata->dcr_host)) {
472 dev_set_drvdata(&op->dev, drvdata);
473 return xilinxfb_assign(&op->dev, drvdata, res.start, &pdata);
476 kfree(drvdata);