Lines Matching defs:io_register
420 struct io_register {
429 struct io_register reg[IGA1_HOR_TOTAL_REG_NUM];
435 struct io_register reg[IGA1_HOR_ADDR_REG_NUM];
441 struct io_register reg[IGA1_HOR_BLANK_START_REG_NUM];
447 struct io_register reg[IGA1_HOR_BLANK_END_REG_NUM];
453 struct io_register reg[IGA1_HOR_SYNC_START_REG_NUM];
459 struct io_register reg[IGA1_HOR_SYNC_END_REG_NUM];
465 struct io_register reg[IGA1_VER_TOTAL_REG_NUM];
471 struct io_register reg[IGA1_VER_ADDR_REG_NUM];
477 struct io_register reg[IGA1_VER_BLANK_START_REG_NUM];
483 struct io_register reg[IGA1_VER_BLANK_END_REG_NUM];
489 struct io_register reg[IGA1_VER_SYNC_START_REG_NUM];
495 struct io_register reg[IGA1_VER_SYNC_END_REG_NUM];
505 struct io_register reg[IGA2_SHADOW_HOR_TOTAL_REG_NUM];
511 struct io_register reg[IGA2_SHADOW_HOR_BLANK_END_REG_NUM];
517 struct io_register reg[IGA2_SHADOW_VER_TOTAL_REG_NUM];
523 struct io_register reg[IGA2_SHADOW_VER_ADDR_REG_NUM];
529 struct io_register reg[IGA2_SHADOW_VER_BLANK_START_REG_NUM];
535 struct io_register reg[IGA2_SHADOW_VER_BLANK_END_REG_NUM];
541 struct io_register reg[IGA2_SHADOW_VER_SYNC_START_REG_NUM];
547 struct io_register reg[IGA2_SHADOW_VER_SYNC_END_REG_NUM];
557 struct io_register reg[IGA2_HOR_TOTAL_REG_NUM];
563 struct io_register reg[IGA2_HOR_ADDR_REG_NUM];
569 struct io_register reg[IGA2_HOR_BLANK_START_REG_NUM];
575 struct io_register reg[IGA2_HOR_BLANK_END_REG_NUM];
581 struct io_register reg[IGA2_HOR_SYNC_START_REG_NUM];
587 struct io_register reg[IGA2_HOR_SYNC_END_REG_NUM];
593 struct io_register reg[IGA2_VER_TOTAL_REG_NUM];
599 struct io_register reg[IGA2_VER_ADDR_REG_NUM];
605 struct io_register reg[IGA2_VER_BLANK_START_REG_NUM];
611 struct io_register reg[IGA2_VER_BLANK_END_REG_NUM];
617 struct io_register reg[IGA2_VER_SYNC_START_REG_NUM];
623 struct io_register reg[IGA2_VER_SYNC_END_REG_NUM];
629 struct io_register reg[IGA1_FETCH_COUNT_REG_NUM];
635 struct io_register reg[IGA2_FETCH_COUNT_REG_NUM];
646 struct io_register reg[IGA1_STARTING_ADDR_REG_NUM];
651 struct io_register reg[IGA2_STARTING_ADDR_REG_NUM];
662 struct io_register reg[LCD_POWER_SEQ_TD0_REG_NUM];
667 struct io_register reg[LCD_POWER_SEQ_TD1_REG_NUM];
672 struct io_register reg[LCD_POWER_SEQ_TD2_REG_NUM];
677 struct io_register reg[LCD_POWER_SEQ_TD3_REG_NUM];
690 struct io_register reg[LCD_HOR_SCALING_FACTOR_REG_NUM];
695 struct io_register reg[LCD_VER_SCALING_FACTOR_REG_NUM];
733 struct io_register reg[IGA1_FIFO_DEPTH_SELECT_REG_NUM];
738 struct io_register reg[IGA1_FIFO_THRESHOLD_REG_NUM];
743 struct io_register reg[IGA1_FIFO_HIGH_THRESHOLD_REG_NUM];
748 struct io_register reg[IGA1_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM];
753 struct io_register reg[IGA2_FIFO_DEPTH_SELECT_REG_NUM];
758 struct io_register reg[IGA2_FIFO_THRESHOLD_REG_NUM];
763 struct io_register reg[IGA2_FIFO_HIGH_THRESHOLD_REG_NUM];
768 struct io_register reg[IGA2_DISPLAY_QUEUE_EXPIRE_NUM_REG_NUM];
892 struct io_register *reg,