Lines Matching refs:ver_sync_start
1798 (device_timing.ver_sync_start);
1800 iga1_crtc_reg.ver_sync_start.reg_num;
1801 reg = iga1_crtc_reg.ver_sync_start.reg;
1806 (device_timing.ver_sync_start,
1909 (device_timing.ver_sync_start);
1911 iga2_crtc_reg.ver_sync_start.reg_num;
1912 reg = iga2_crtc_reg.ver_sync_start.reg;
1917 (device_timing.ver_sync_start,
2652 crt_reg.ver_total - (crt_reg.ver_sync_start + crt_reg.ver_sync_end);
2653 var->lower_margin = crt_reg.ver_sync_start - crt_reg.ver_addr;