Lines Matching defs:p_gfx_dpa_setting
2572 *p_gfx_dpa_setting)
2579 p_gfx_dpa_setting->DVP0, 0x0F);
2583 p_gfx_dpa_setting->DVP0ClockDri_S, BIT2);
2585 p_gfx_dpa_setting->DVP0ClockDri_S1,
2588 p_gfx_dpa_setting->DVP0DataDri_S, BIT1);
2590 p_gfx_dpa_setting->DVP0DataDri_S1, BIT5);
2598 p_gfx_dpa_setting->DVP1, 0x0F);
2602 p_gfx_dpa_setting->DVP1Driving, 0x0F);
2609 p_gfx_dpa_setting->DFPHigh, 0x0F);
2616 p_gfx_dpa_setting->DFPLow, 0x0F);
2623 p_gfx_dpa_setting->DFPHigh, 0x0F);
2625 p_gfx_dpa_setting->DFPLow, 0x0F);