Lines Matching refs:mclks
661 int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs;
687 mclks = 5;
688 mclks += 3;
689 mclks += 1;
690 mclks += cas;
691 mclks += 1;
692 mclks += 1;
693 mclks += 1;
694 mclks += 1;
701 mclks+=4;
710 mclk_loop = mclks+mclk_extra;
847 int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs;
882 mclks = 1; /* 2 edge sync. may be very close to edge so just put one. */
884 mclks += 1; /* arb_hp_req */
885 mclks += 5; /* ap_hp_req tiling pipeline */
887 mclks += 2; /* tc_req latency fifo */
888 mclks += 2; /* fb_cas_n_ memory request to fbio block */
889 mclks += 7; /* sm_d_rdv data returned from fbio block */
894 mclks += 4;
896 mclks += 2;
899 mclks += 2;
901 mclks += 1;
921 mclks+=4; /* Mp can get in with a burst of 8. */
930 mclk_loop = mclks+mclk_extra;
932 us_m_min = mclks * 1000*1000 / mclk_freq; /* Minimum Mclk latency in us */