Lines Matching refs:fbi
51 struct nuc900fb_info *fbi = info->par;
52 void __iomem *regs = fbi->io;
63 writel(fbi->regs.lcd_va_fbctrl, regs + REG_LCM_VA_FBCTRL);
64 writel(fbi->regs.lcd_va_scale, regs + REG_LCM_VA_SCALE);
70 static unsigned int nuc900fb_calc_pixclk(struct nuc900fb_info *fbi,
73 unsigned long clk = fbi->clk_rate;
82 dev_dbg(fbi->dev, "pixclk %ld, divisor is %lld\n", pixclk, div);
93 struct nuc900fb_info *fbi = info->par;
94 struct nuc900fb_mach_info *mach_info = fbi->dev->platform_data;
100 dev_dbg(fbi->dev, "check_var(var=%p, info=%p)\n", var, info);
141 fbi->regs.lcd_dccs = display->dccs;
142 fbi->regs.lcd_device_ctrl = display->devctl;
143 fbi->regs.lcd_va_fbctrl = display->fbctrl;
144 fbi->regs.lcd_va_scale = display->scale;
226 struct nuc900fb_info *fbi = info->par;
227 void __iomem *regs = fbi->io;
231 clkdiv = nuc900fb_calc_pixclk(fbi, var->pixclock) - 1;
235 nuc900fb_calculate_lcd_regs(info, &fbi->regs);
239 dev_dbg(fbi->dev, "new lcd register set:\n");
240 dev_dbg(fbi->dev, "dccs = 0x%08x\n", fbi->regs.lcd_dccs);
241 dev_dbg(fbi->dev, "dev_ctl = 0x%08x\n", fbi->regs.lcd_device_ctrl);
242 dev_dbg(fbi->dev, "crtc_size = 0x%08x\n", fbi->regs.lcd_crtc_size);
243 dev_dbg(fbi->dev, "crtc_dend = 0x%08x\n", fbi->regs.lcd_crtc_dend);
244 dev_dbg(fbi->dev, "crtc_hr = 0x%08x\n", fbi->regs.lcd_crtc_hr);
245 dev_dbg(fbi->dev, "crtc_hsync = 0x%08x\n", fbi->regs.lcd_crtc_hsync);
246 dev_dbg(fbi->dev, "crtc_vr = 0x%08x\n", fbi->regs.lcd_crtc_vr);
248 writel(fbi->regs.lcd_device_ctrl, regs + REG_LCM_DEV_CTRL);
249 writel(fbi->regs.lcd_crtc_size, regs + REG_LCM_CRTC_SIZE);
250 writel(fbi->regs.lcd_crtc_dend, regs + REG_LCM_CRTC_DEND);
251 writel(fbi->regs.lcd_crtc_hr, regs + REG_LCM_CRTC_HR);
252 writel(fbi->regs.lcd_crtc_hsync, regs + REG_LCM_CRTC_HSYNC);
253 writel(fbi->regs.lcd_crtc_vr, regs + REG_LCM_CRTC_VR);
258 writel(fbi->regs.lcd_dccs, regs + REG_LCM_DCCS);
360 struct nuc900fb_info *fbi = info->par;
361 struct nuc900fb_mach_info *mach_info = fbi->dev->platform_data;
362 void __iomem *regs = fbi->io;
392 struct nuc900fb_info *fbi = info->par;
396 dev_dbg(fbi->dev, "nuc900fb_map_video_memory(fbi=%p) map_size %lu\n",
397 fbi, map_size);
399 info->screen_base = dma_alloc_writecombine(fbi->dev, map_size,
413 struct nuc900fb_info *fbi = info->par;
414 dma_free_writecombine(fbi->dev, PAGE_ALIGN(info->fix.smem_len),
420 struct nuc900fb_info *fbi = dev_id;
421 void __iomem *regs = fbi->io;
422 void __iomem *irq_base = fbi->irq_base;
471 static inline int nuc900fb_cpufreq_register(struct nuc900fb_info *fbi)
473 fbi->freq_transition.notifier_call = nuc900fb_cpufreq_transition;
474 return cpufreq_register_notifier(&fbi->freq_transition,
478 static inline void nuc900fb_cpufreq_deregister(struct nuc900fb_info *fbi)
480 cpufreq_unregister_notifier(&fbi->freq_transition,
490 static inline int nuc900fb_cpufreq_register(struct nuc900fb_info *fbi)
504 struct nuc900fb_info *fbi;
544 fbi = fbinfo->par;
545 fbi->dev = &pdev->dev;
548 fbi->drv_type = LCDDRV_NUC950;
554 fbi->mem = request_mem_region(res->start, size, pdev->name);
555 if (fbi->mem == NULL) {
561 fbi->io = ioremap(res->start, size);
562 if (fbi->io == NULL) {
568 fbi->irq_base = fbi->io + REG_LCM_INT_CS;
572 writel(0, fbi->io + REG_LCM_DCCS);
588 fbinfo->pseudo_palette = &fbi->pseudo_pal;
599 fbi->clk = clk_get(&pdev->dev, NULL);
600 if (!fbi->clk || IS_ERR(fbi->clk)) {
606 clk_enable(fbi->clk);
609 fbi->clk_rate = clk_get_rate(fbi->clk);
638 ret = nuc900fb_cpufreq_register(fbi);
657 nuc900fb_cpufreq_deregister(fbi);
661 clk_disable(fbi->clk);
662 clk_put(fbi->clk);
664 free_irq(irq, fbi);
666 iounmap(fbi->io);
679 struct nuc900fb_info *fbi = info->par;
680 void __iomem *regs = fbi->io;
692 struct nuc900fb_info *fbi = fbinfo->par;
700 iounmap(fbi->io);
703 free_irq(irq, fbi);
705 release_resource(fbi->mem);
706 kfree(fbi->mem);
734 struct nuc900fb_info *fbi = fbinfo->par;
738 clk_enable(fbi->clk);