Lines Matching refs:minfo
282 static int Ti3026_calcclock(const struct matrox_fb_info *minfo,
291 fvco = PLL_calcclock(minfo, freq, fmax, &lin, &lfeed, &lpost);
298 static int Ti3026_setpclk(struct matrox_fb_info *minfo, int clk)
302 struct matrox_hw_state *hw = &minfo->hw;
306 f_pll = Ti3026_calcclock(minfo, clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost);
316 Bpp = minfo->curr.final_bppShift;
318 if (minfo->fbcon.var.bits_per_pixel == 24) {
337 if (minfo->fbcon.var.bits_per_pixel == 24) {
340 if (minfo->accel.ramdac_rev > 0x20) {
341 if (isInterleave(minfo))
348 if (isInterleave(minfo))
356 if (minfo->devflags.mga_24bpp_fix)
368 static int Ti3026_init(struct matrox_fb_info *minfo, struct my_timming *m)
370 u_int8_t muxctrl = isInterleave(minfo) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT;
371 struct matrox_hw_state *hw = &minfo->hw;
376 switch (minfo->fbcon.var.bits_per_pixel) {
391 hw->DACreg[POS3026_XTRUECOLORCTRL] = (minfo->fbcon.var.green.length == 5) ? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565);
408 if (matroxfb_vgaHWinit(minfo, m)) return 1;
420 if (minfo->video.len < 0x400000)
422 else if (minfo->video.len > 0x400000)
434 if (isInterleave(minfo)) hw->MXoptionReg |= 0x00001000;
437 Ti3026_setpclk(minfo, m->pixclock);
441 static void ti3026_setMCLK(struct matrox_fb_info *minfo, int fout)
451 f_pll = Ti3026_calcclock(minfo, fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p);
454 outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
455 pclk_n = inTi3026(minfo, TVP3026_XPIXPLLDATA);
456 outTi3026(minfo, TVP3026_XPLLADDR, 0xFD);
457 pclk_m = inTi3026(minfo, TVP3026_XPIXPLLDATA);
458 outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
459 pclk_p = inTi3026(minfo, TVP3026_XPIXPLLDATA);
462 outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
463 outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
466 outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
467 outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_n | 0xC0);
468 outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_m);
469 outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_p | 0xB0);
473 if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
481 mclk_ctl = inTi3026(minfo, TVP3026_XMEMPLLCTRL);
482 outTi3026(minfo, TVP3026_XMEMPLLCTRL, mclk_ctl & 0xE7);
483 outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_STROBEMKC4);
486 outTi3026(minfo, TVP3026_XPLLADDR, 0xFB);
487 outTi3026(minfo, TVP3026_XMEMPLLDATA, 0x00);
490 outTi3026(minfo, TVP3026_XPLLADDR, 0xF3);
491 outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_n | 0xC0);
492 outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_m);
493 outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_p | 0xB0);
497 if (inTi3026(minfo, TVP3026_XMEMPLLDATA) & 0x40)
505 if (isMilleniumII(minfo)) {
514 minfo->hw.MXoptionReg = (minfo->hw.MXoptionReg & ~0x000F0000) | (rfhcnt << 16);
515 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg);
518 outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);
519 outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl ) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_STROBEMKC4);
522 outTi3026(minfo, TVP3026_XPLLADDR, 0xFE);
523 outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
526 outTi3026(minfo, TVP3026_XPLLADDR, 0xFC);
527 outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_n);
528 outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_m);
529 outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_p);
533 if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
541 static void ti3026_ramdac_init(struct matrox_fb_info *minfo)
545 minfo->features.pll.vco_freq_min = 110000;
546 minfo->features.pll.ref_freq = 114545;
547 minfo->features.pll.feed_div_min = 2;
548 minfo->features.pll.feed_div_max = 24;
549 minfo->features.pll.in_div_min = 2;
550 minfo->features.pll.in_div_max = 63;
551 minfo->features.pll.post_shift_max = 3;
552 if (minfo->devflags.noinit)
554 ti3026_setMCLK(minfo, 60000);
557 static void Ti3026_restore(struct matrox_fb_info *minfo)
561 struct matrox_hw_state *hw = &minfo->hw;
575 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
579 matroxfb_vgaHWrestore(minfo);
583 minfo->crtc1.panpos = -1;
588 outTi3026(minfo, DACseq[i], hw->DACreg[i]);
591 outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
592 progdac[0] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
593 progdac[3] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
594 outTi3026(minfo, TVP3026_XPLLADDR, 0x15);
595 progdac[1] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
596 progdac[4] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
597 outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
598 progdac[2] = inTi3026(minfo, TVP3026_XPIXPLLDATA);
599 progdac[5] = inTi3026(minfo, TVP3026_XLOOPPLLDATA);
608 outTi3026(minfo, TVP3026_XCLKCTRL, hw->DACreg[POS3026_XCLKCTRL]);
609 outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
610 outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0);
611 outTi3026(minfo, TVP3026_XPIXPLLDATA, 0);
613 outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
615 outTi3026(minfo, TVP3026_XPIXPLLDATA, hw->DACclk[i]);
619 outTi3026(minfo, TVP3026_XPLLADDR, 0x3F);
621 if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40)
634 outTi3026(minfo, TVP3026_XMEMPLLCTRL, hw->DACreg[POS3026_XMEMPLLCTRL]);
635 outTi3026(minfo, TVP3026_XPLLADDR, 0x00);
637 outTi3026(minfo, TVP3026_XLOOPPLLDATA, hw->DACclk[i]);
643 outTi3026(minfo, TVP3026_XPLLADDR, 0x3F);
645 if (inTi3026(minfo, TVP3026_XLOOPPLLDATA) & 0x40)
670 static void Ti3026_reset(struct matrox_fb_info *minfo)
674 ti3026_ramdac_init(minfo);
681 static int Ti3026_preinit(struct matrox_fb_info *minfo)
689 struct matrox_hw_state *hw = &minfo->hw;
693 minfo->millenium = 1;
694 minfo->milleniumII = (minfo->pcidev->device != PCI_DEVICE_ID_MATROX_MIL);
695 minfo->capable.cfb4 = 1;
696 minfo->capable.text = 1; /* isMilleniumII(minfo); */
697 minfo->capable.vxres = isMilleniumII(minfo) ? vxres_mill2 : vxres_mill1;
699 minfo->outputs[0].data = minfo;
700 minfo->outputs[0].output = &ti3026_output;
701 minfo->outputs[0].src = minfo->outputs[0].default_src;
702 minfo->outputs[0].mode = MATROXFB_OUTPUT_MODE_MONITOR;
704 if (minfo->devflags.noinit)
709 if (minfo->devflags.novga)
711 if (minfo->devflags.nobios)
713 if (minfo->devflags.nopciretry)
715 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg);
717 minfo->accel.ramdac_rev = inTi3026(minfo, TVP3026_XSILICONREV);
719 outTi3026(minfo, TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED);
720 outTi3026(minfo, TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR);
721 outTi3026(minfo, TVP3026_XMUXCTRL, TVP3026_XMUXCTRL_VGA);
723 outTi3026(minfo, TVP3026_XPLLADDR, 0x2A);
724 outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0x00);
725 outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00);
729 outTi3026(minfo, TVP3026_XMEMPLLCTRL, TVP3026_XMEMPLLCTRL_STROBEMKC4 | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL);