Lines Matching refs:POWER0_COM_DCLK
54 #define POWER0_COM_DCLK 0x01 /* COM Voltage DC Bias DAC Serial Data Clock */
124 lcdtg_ssp_i2c_send(lcd, data | POWER0_COM_DCLK);
130 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK | POWER0_COM_DOUT);
131 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK);
138 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK);
139 lcdtg_ssp_i2c_send(lcd, base | POWER0_COM_DCLK | POWER0_COM_DOUT);
223 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_OFF |
236 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
254 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |
267 POWER0_COM_DCLK | POWER0_COM_DOUT | POWER0_DAC_ON |