Lines Matching defs:musb
27 static void tusb_source_power(struct musb *musb, int is_on);
36 u8 tusb_get_revision(struct musb *musb)
38 void __iomem *tbase = musb->ctrl_base;
53 static int __init tusb_print_revision(struct musb *musb)
55 void __iomem *tbase = musb->ctrl_base;
58 rev = tusb_get_revision(musb);
78 return tusb_get_revision(musb);
84 static void tusb_wbus_quirk(struct musb *musb, int enabled)
86 void __iomem *tbase = musb->ctrl_base;
258 static struct musb *the_musb;
270 struct musb *musb = the_musb;
271 void __iomem *tbase = musb->ctrl_base;
276 * drawing VBUS, as with OTG mA can be less than musb->min_power.
278 if (musb->set_clock) {
280 musb->set_clock(musb->clock, 1);
282 musb->set_clock(musb->clock, 0);
295 if (x->default_a || mA < (musb->min_power << 1))
300 musb->is_bus_powered = 1;
303 musb->is_bus_powered = 0;
316 static void tusb_set_clock_source(struct musb *musb, unsigned mode)
318 void __iomem *tbase = musb->ctrl_base;
342 void tusb_allow_idle(struct musb *musb, u32 wakeup_enables)
344 void __iomem *tbase = musb->ctrl_base;
348 && (tusb_get_revision(musb) == TUSB_REV_30))
349 tusb_wbus_quirk(musb, 1);
351 tusb_set_clock_source(musb, 0);
363 if (is_host_active(musb)) {
379 int musb_platform_get_vbus_status(struct musb *musb)
381 void __iomem *tbase = musb->ctrl_base;
410 struct musb *musb = (void *)_musb;
413 spin_lock_irqsave(&musb->lock, flags);
415 switch (musb->xceiv->state) {
417 if ((musb->a_wait_bcon != 0)
418 && (musb->idle_timeout == 0
419 || time_after(jiffies, musb->idle_timeout))) {
421 otg_state_string(musb));
425 tusb_source_power(musb, 0);
430 if (!musb->is_active) {
434 if (is_host_active(musb) && (musb->port1_status >> 16))
438 if (is_peripheral_enabled(musb) && !musb->gadget_driver)
444 if (is_otg_enabled(musb))
450 tusb_allow_idle(musb, wakeups);
453 spin_unlock_irqrestore(&musb->lock, flags);
469 void musb_platform_try_idle(struct musb *musb, unsigned long timeout)
478 if (musb->is_active || ((musb->a_wait_bcon == 0)
479 && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
480 DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
497 otg_state_string(musb),
509 static void tusb_source_power(struct musb *musb, int is_on)
511 void __iomem *tbase = musb->ctrl_base;
522 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
525 if (musb->set_clock)
526 musb->set_clock(musb->clock, 1);
528 musb->xceiv->default_a = 1;
529 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
533 MUSB_HST_MODE(musb);
542 switch (musb->xceiv->state) {
545 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
548 musb->xceiv->state = OTG_STATE_A_IDLE;
551 musb->xceiv->state = OTG_STATE_A_IDLE;
553 musb->is_active = 0;
554 musb->xceiv->default_a = 1;
555 MUSB_HST_MODE(musb);
557 musb->is_active = 0;
558 musb->xceiv->default_a = 0;
559 musb->xceiv->state = OTG_STATE_B_IDLE;
560 MUSB_DEV_MODE(musb);
565 if (musb->set_clock)
566 musb->set_clock(musb->clock, 0);
573 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
576 otg_state_string(musb),
577 musb_readb(musb->mregs, MUSB_DEVCTL),
591 * and then setting musb->board_mode. For now, only support OTG mode.
593 int musb_platform_set_mode(struct musb *musb, u8 musb_mode)
595 void __iomem *tbase = musb->ctrl_base;
598 if (musb->board_mode != MUSB_OTG) {
656 tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
665 if (is_otg_enabled(musb))
668 default_a = is_host_enabled(musb);
670 musb->xceiv->default_a = default_a;
671 tusb_source_power(musb, default_a);
682 if ((is_otg_enabled(musb) && !musb->xceiv->default_a)
683 || !is_host_enabled(musb)) {
685 /* ? musb_root_disconnect(musb); */
686 musb->port1_status &=
697 if (musb->xceiv->state != OTG_STATE_B_IDLE) {
699 musb->xceiv->state = OTG_STATE_B_IDLE;
700 musb->int_usb |= MUSB_INTR_DISCONNECT;
702 musb->is_active = 0;
705 otg_state_string(musb), otg_stat);
707 schedule_work(&musb->irq_work);
711 otg_state_string(musb), otg_stat);
713 switch (musb->xceiv->state) {
716 musb_set_vbus(musb, 1);
719 if (musb->a_wait_bcon != 0)
720 musb->is_active = 0;
722 musb->is_active = 1;
740 if (musb->vbuserr_retry) {
741 musb->vbuserr_retry--;
742 tusb_source_power(musb, 1);
744 musb->vbuserr_retry
746 tusb_source_power(musb, 0);
759 DBG(4, "%s timer, %03x\n", otg_state_string(musb), otg_stat);
761 switch (musb->xceiv->state) {
766 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
773 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
774 musb->is_active = 0;
776 + msecs_to_jiffies(musb->a_wait_bcon);
780 tusb_source_power(musb, 0);
784 if (musb->a_wait_bcon != 0)
786 + msecs_to_jiffies(musb->a_wait_bcon);
796 schedule_work(&musb->irq_work);
803 struct musb *musb = __hci;
804 void __iomem *tbase = musb->ctrl_base;
808 spin_lock_irqsave(&musb->lock, flags);
817 musb->int_usb = (u8) int_src;
824 if (tusb_get_revision(musb) == TUSB_REV_30)
825 tusb_wbus_quirk(musb, 0);
838 tusb_set_clock_source(musb, 1);
843 musb->is_active = 1;
844 schedule_work(&musb->irq_work);
847 musb->is_active ? "" : "in", reg);
859 idle_timeout = tusb_otg_ints(musb, int_src, tbase);
877 musb_dma_completion(musb, i, 1);
889 musb->int_rx = (((musb_src >> 16) & 0xffff) << 1);
890 musb->int_tx = (musb_src & 0xffff);
892 musb->int_rx = 0;
893 musb->int_tx = 0;
897 musb_interrupt(musb);
903 musb_platform_try_idle(musb, idle_timeout);
906 spin_unlock_irqrestore(&musb->lock, flags);
918 void musb_platform_enable(struct musb *musb)
920 void __iomem *tbase = musb->ctrl_base;
944 set_irq_type(musb->nIrq, IRQ_TYPE_LEVEL_LOW);
962 void musb_platform_disable(struct musb *musb)
964 void __iomem *tbase = musb->ctrl_base;
986 static void __init tusb_setup_cpu_interface(struct musb *musb)
988 void __iomem *tbase = musb->ctrl_base;
1013 static int __init tusb_start(struct musb *musb)
1015 void __iomem *tbase = musb->ctrl_base;
1020 if (musb->board_set_power)
1021 ret = musb->board_set_power(1);
1027 spin_lock_irqsave(&musb->lock, flags);
1035 ret = tusb_print_revision(musb);
1047 tusb_set_clock_source(musb, 1);
1058 tusb_setup_cpu_interface(musb);
1069 spin_unlock_irqrestore(&musb->lock, flags);
1074 spin_unlock_irqrestore(&musb->lock, flags);
1076 if (musb->board_set_power)
1077 musb->board_set_power(0);
1082 int __init musb_platform_init(struct musb *musb, void *board_data)
1090 musb->xceiv = otg_get_transceiver();
1091 if (!musb->xceiv)
1094 pdev = to_platform_device(musb->controller);
1098 musb->async = mem->start;
1107 musb->sync = mem->start;
1115 musb->sync_va = sync;
1120 musb->mregs += TUSB_BASE_OFFSET;
1122 ret = tusb_start(musb);
1128 musb->isr = tusb_interrupt;
1130 if (is_host_enabled(musb))
1131 musb->board_set_vbus = tusb_source_power;
1132 if (is_peripheral_enabled(musb)) {
1133 musb->xceiv->set_power = tusb_draw_power;
1134 the_musb = musb;
1137 setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
1144 otg_put_transceiver(musb->xceiv);
1150 int musb_platform_exit(struct musb *musb)
1155 if (musb->board_set_power)
1156 musb->board_set_power(0);
1158 iounmap(musb->sync_va);
1160 otg_put_transceiver(musb->xceiv);