Lines Matching refs:MUSB_CSR0
535 musb_writew(regs, MUSB_CSR0, csr);
554 DBG(2, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0));
589 musb_writew(regs, MUSB_CSR0, csr);
637 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDRXPKTRDY);
638 while ((musb_readw(regs, MUSB_CSR0)
674 csr = musb_readw(regs, MUSB_CSR0);
684 musb_writew(regs, MUSB_CSR0,
688 csr = musb_readw(regs, MUSB_CSR0);
693 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDSETUPEND);
707 csr = musb_readw(regs, MUSB_CSR0);
881 musb_writew(regs, MUSB_CSR0,
898 musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SENDSTALL);
982 musb_writew(regs, MUSB_CSR0,
993 musb_writew(regs, MUSB_CSR0, musb->ackpend);
1044 csr = musb_readw(regs, MUSB_CSR0);
1054 musb_writew(regs, MUSB_CSR0, csr);