Lines Matching defs:musb
140 static inline struct musb *dev_to_musb(struct device *dev)
338 void musb_load_testpacket(struct musb *musb)
340 void __iomem *regs = musb->endpoints[0].regs;
342 musb_ep_select(musb->mregs, 0);
343 musb_write_fifo(musb->control_ep,
350 const char *otg_state_string(struct musb *musb)
352 switch (musb->xceiv->state) {
377 struct musb *musb = (struct musb *)data;
380 spin_lock_irqsave(&musb->lock, flags);
381 switch (musb->xceiv->state) {
384 musb_g_disconnect(musb);
385 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
386 musb->is_active = 0;
390 DBG(1, "HNP: %s timeout\n", otg_state_string(musb));
391 musb_set_vbus(musb, 0);
392 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
395 DBG(1, "HNP: Unhandled mode %s\n", otg_state_string(musb));
397 musb->ignore_disconnect = 0;
398 spin_unlock_irqrestore(&musb->lock, flags);
404 void musb_hnp_stop(struct musb *musb)
406 struct usb_hcd *hcd = musb_to_hcd(musb);
407 void __iomem *mbase = musb->mregs;
410 DBG(1, "HNP: stop from %s\n", otg_state_string(musb));
412 switch (musb->xceiv->state) {
414 musb_g_disconnect(musb);
415 DBG(1, "HNP: back to %s\n", otg_state_string(musb));
420 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
421 MUSB_DEV_MODE(musb);
429 otg_state_string(musb));
437 musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16);
448 * @param musb instance pointer
454 static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
468 DBG(3, "RESUME (%s)\n", otg_state_string(musb));
472 void __iomem *mbase = musb->mregs;
474 switch (musb->xceiv->state) {
482 musb->int_usb &= ~MUSB_INTR_SUSPEND;
491 musb->port1_status |=
494 musb->rh_timer = jiffies
497 musb->xceiv->state = OTG_STATE_A_HOST;
498 musb->is_active = 1;
499 usb_hcd_resume_root_hub(musb_to_hcd(musb));
502 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
503 musb->is_active = 1;
504 MUSB_DEV_MODE(musb);
509 otg_state_string(musb));
513 switch (musb->xceiv->state) {
517 musb->xceiv->state = OTG_STATE_A_HOST;
518 usb_hcd_resume_root_hub(musb_to_hcd(musb));
530 musb->int_usb |= MUSB_INTR_DISCONNECT;
531 musb->int_usb &= ~MUSB_INTR_SUSPEND;
534 musb_g_resume(musb);
537 musb->int_usb &= ~MUSB_INTR_SUSPEND;
543 otg_state_string(musb));
551 void __iomem *mbase = musb->mregs;
553 DBG(1, "SESSION_REQUEST (%s)\n", otg_state_string(musb));
563 musb->ep0_stage = MUSB_EP0_START;
564 musb->xceiv->state = OTG_STATE_A_IDLE;
565 MUSB_HST_MODE(musb);
566 musb_set_vbus(musb, 1);
590 switch (musb->xceiv->state) {
600 if (musb->vbuserr_retry) {
601 void __iomem *mbase = musb->mregs;
603 musb->vbuserr_retry--;
608 musb->port1_status |=
618 otg_state_string(musb),
632 VBUSERR_RETRY_COUNT - musb->vbuserr_retry,
633 musb->port1_status);
637 musb_set_vbus(musb, 0);
644 otg_state_string(musb), devctl, power);
647 switch (musb->xceiv->state) {
657 musb_hnp_stop(musb);
658 usb_hcd_resume_root_hub(musb_to_hcd(musb));
659 musb_root_disconnect(musb);
660 musb_platform_try_idle(musb, jiffies
661 + msecs_to_jiffies(musb->a_wait_bcon
667 if (!musb->is_active)
670 musb_g_suspend(musb);
671 musb->is_active = is_otg_enabled(musb)
672 && musb->xceiv->gadget->b_hnp_enable;
673 if (musb->is_active) {
675 musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
677 mod_timer(&musb->otg_timer, jiffies
684 if (musb->a_wait_bcon != 0)
685 musb_platform_try_idle(musb, jiffies
686 + msecs_to_jiffies(musb->a_wait_bcon));
689 musb->xceiv->state = OTG_STATE_A_SUSPEND;
690 musb->is_active = is_otg_enabled(musb)
691 && musb->xceiv->host->b_hnp_enable;
699 musb->is_active = 0;
706 struct usb_hcd *hcd = musb_to_hcd(musb);
709 musb->is_active = 1;
712 musb->ep0_stage = MUSB_EP0_START;
716 if (is_peripheral_active(musb)) {
719 musb_writew(musb->mregs, MUSB_INTRTXE, musb->epmask);
720 musb_writew(musb->mregs, MUSB_INTRRXE, musb->epmask & 0xfffe);
721 musb_writeb(musb->mregs, MUSB_INTRUSBE, 0xf7);
723 musb->port1_status &= ~(USB_PORT_STAT_LOW_SPEED
727 musb->port1_status |= USB_PORT_STAT_CONNECTION
732 musb->port1_status |= USB_PORT_STAT_LOW_SPEED;
735 switch (musb->xceiv->state) {
747 musb->xceiv->state = OTG_STATE_B_HOST;
749 musb->ignore_disconnect = 0;
750 del_timer(&musb->otg_timer);
755 musb->xceiv->state = OTG_STATE_A_HOST;
762 MUSB_HST_MODE(musb);
769 otg_state_string(musb), devctl);
773 if ((int_usb & MUSB_INTR_DISCONNECT) && !musb->ignore_disconnect) {
775 otg_state_string(musb),
776 MUSB_MODE(musb), devctl);
779 switch (musb->xceiv->state) {
783 usb_hcd_resume_root_hub(musb_to_hcd(musb));
784 musb_root_disconnect(musb);
785 if (musb->a_wait_bcon != 0 && is_otg_enabled(musb))
786 musb_platform_try_idle(musb, jiffies
787 + msecs_to_jiffies(musb->a_wait_bcon));
797 musb_root_disconnect(musb);
798 musb_to_hcd(musb)->self.is_b_host = 0;
799 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
800 MUSB_DEV_MODE(musb);
801 musb_g_disconnect(musb);
804 musb_hnp_stop(musb);
805 musb_root_disconnect(musb);
813 musb_g_disconnect(musb);
818 otg_state_string(musb));
840 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
843 DBG(1, "BUS RESET as %s\n", otg_state_string(musb));
844 switch (musb->xceiv->state) {
851 musb->ignore_disconnect = 1;
852 musb_g_reset(musb);
857 otg_state_string(musb),
858 TA_WAIT_BCON(musb));
859 mod_timer(&musb->otg_timer, jiffies
860 + msecs_to_jiffies(TA_WAIT_BCON(musb)));
863 musb->ignore_disconnect = 0;
864 del_timer(&musb->otg_timer);
865 musb_g_reset(musb);
869 otg_state_string(musb));
870 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
871 musb_g_reset(musb);
875 musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
878 musb_g_reset(musb);
882 otg_state_string(musb));
888 schedule_work(&musb->irq_work);
898 void musb_start(struct musb *musb)
900 void __iomem *regs = musb->mregs;
906 musb_writew(regs, MUSB_INTRTXE, musb->epmask);
907 musb_writew(regs, MUSB_INTRRXE, musb->epmask & 0xfffe);
920 musb->is_active = 0;
924 if (is_otg_enabled(musb)) {
931 musb->is_active = 1;
935 } else if (is_host_enabled(musb)) {
941 musb->is_active = 1;
943 musb_platform_enable(musb);
948 static void musb_generic_disable(struct musb *musb)
950 void __iomem *mbase = musb->mregs;
975 void musb_stop(struct musb *musb)
978 musb_platform_disable(musb);
979 musb_generic_disable(musb);
982 musb_platform_try_idle(musb, 0);
987 struct musb *musb = dev_to_musb(&pdev->dev);
990 spin_lock_irqsave(&musb->lock, flags);
991 musb_platform_disable(musb);
992 musb_generic_disable(musb);
993 if (musb->clock)
994 clk_put(musb->clock);
995 spin_unlock_irqrestore(&musb->lock, flags);
1135 fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep,
1138 void __iomem *mbase = musb->mregs;
1152 (1 << (musb->config->ram_bits + 2)))
1156 if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2)))
1168 musb->bulk_ep = hw_ep;
1202 musb->epmask |= (1 << hw_ep->epnum);
1211 static int __init ep_config_from_table(struct musb *musb)
1216 struct musb_hw_ep *hw_ep = musb->endpoints;
1218 if (musb->config->fifo_cfg) {
1219 cfg = musb->config->fifo_cfg;
1220 n = musb->config->fifo_cfg_size;
1259 offset = fifo_setup(musb, hw_ep, &ep0_cfg, 0);
1263 * be better than static musb->config->num_eps and DYN_FIFO_SIZE...
1269 if (epn >= musb->config->num_eps) {
1274 offset = fifo_setup(musb, hw_ep + epn, cfg++, offset);
1281 musb->nr_endpoints = max(epn, musb->nr_endpoints);
1286 n + 1, musb->config->num_eps * 2 - 1,
1287 offset, (1 << (musb->config->ram_bits + 2)));
1290 if (!musb->bulk_ep) {
1302 * @param musb the controller
1304 static int __init ep_config_from_hw(struct musb *musb)
1308 void *mbase = musb->mregs;
1314 for (epnum = 1; epnum < musb->config->num_eps; epnum++) {
1316 hw_ep = musb->endpoints + epnum;
1318 ret = musb_read_fifosize(musb, hw_ep, epnum);
1332 if (musb->bulk_ep)
1334 musb->bulk_ep = hw_ep;
1339 if (!musb->bulk_ep) {
1353 static int __init musb_core_init(u16 musb_type, struct musb *musb)
1358 void __iomem *mbase = musb->mregs;
1368 musb->dyn_fifo = true;
1372 musb->bulk_combine = true;
1376 musb->bulk_split = true;
1380 musb->hb_iso_rx = true;
1384 musb->hb_iso_tx = true;
1394 musb->is_multipoint = 1;
1397 musb->is_multipoint = 0;
1409 musb->hwvers = musb_read_hwvers(mbase);
1410 snprintf(aRevision, 32, "%d.%d%s", MUSB_HWVERS_MAJOR(musb->hwvers),
1411 MUSB_HWVERS_MINOR(musb->hwvers),
1412 (musb->hwvers & MUSB_HWVERS_RC) ? "RC" : "");
1417 musb_configure_ep0(musb);
1420 musb->nr_endpoints = 1;
1421 musb->epmask = 1;
1423 if (musb->dyn_fifo)
1424 status = ep_config_from_table(musb);
1426 status = ep_config_from_hw(musb);
1432 for (i = 0; i < musb->nr_endpoints; i++) {
1433 struct musb_hw_ep *hw_ep = musb->endpoints + i;
1437 hw_ep->fifo_async = musb->async + 0x400 + MUSB_FIFO_OFFSET(i);
1438 hw_ep->fifo_sync = musb->sync + 0x400 + MUSB_FIFO_OFFSET(i);
1440 musb->sync_va + 0x400 + MUSB_FIFO_OFFSET(i);
1489 struct musb *musb = __hci;
1491 spin_lock_irqsave(&musb->lock, flags);
1493 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
1494 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
1495 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
1497 if (musb->int_usb || musb->int_tx || musb->int_rx)
1498 retval = musb_interrupt(musb);
1500 spin_unlock_irqrestore(&musb->lock, flags);
1511 * irq sources (phy, dma, etc) will be handled first, musb->int_* values
1516 irqreturn_t musb_interrupt(struct musb *musb)
1523 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
1524 power = musb_readb(musb->mregs, MUSB_POWER);
1528 musb->int_usb, musb->int_tx, musb->int_rx);
1531 if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
1532 if (!musb->gadget_driver) {
1541 if (musb->int_usb)
1542 retval |= musb_stage0_irq(musb, musb->int_usb,
1548 if (musb->int_tx & 1) {
1550 retval |= musb_h_ep0_irq(musb);
1552 retval |= musb_g_ep0_irq(musb);
1556 reg = musb->int_rx >> 1;
1560 /* musb_ep_select(musb->mregs, ep_num); */
1565 musb_host_rx(musb, ep_num);
1568 musb_g_rx(musb, ep_num);
1577 reg = musb->int_tx >> 1;
1581 /* musb_ep_select(musb->mregs, ep_num); */
1586 musb_host_tx(musb, ep_num);
1589 musb_g_tx(musb, ep_num);
1607 void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit)
1609 u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
1618 musb_h_ep0_irq(musb);
1620 musb_g_ep0_irq(musb);
1628 musb_host_tx(musb, epnum);
1631 musb_g_tx(musb, epnum);
1637 musb_host_rx(musb, epnum);
1640 musb_g_rx(musb, epnum);
1657 struct musb *musb = dev_to_musb(dev);
1661 spin_lock_irqsave(&musb->lock, flags);
1662 ret = sprintf(buf, "%s\n", otg_state_string(musb));
1663 spin_unlock_irqrestore(&musb->lock, flags);
1672 struct musb *musb = dev_to_musb(dev);
1676 spin_lock_irqsave(&musb->lock, flags);
1678 status = musb_platform_set_mode(musb, MUSB_HOST);
1680 status = musb_platform_set_mode(musb, MUSB_PERIPHERAL);
1682 status = musb_platform_set_mode(musb, MUSB_OTG);
1685 spin_unlock_irqrestore(&musb->lock, flags);
1695 struct musb *musb = dev_to_musb(dev);
1704 spin_lock_irqsave(&musb->lock, flags);
1706 musb->a_wait_bcon = val ? max_t(int, val, OTG_TIME_A_WAIT_BCON) : 0 ;
1707 if (musb->xceiv->state == OTG_STATE_A_WAIT_BCON)
1708 musb->is_active = 0;
1709 musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val));
1710 spin_unlock_irqrestore(&musb->lock, flags);
1718 struct musb *musb = dev_to_musb(dev);
1723 spin_lock_irqsave(&musb->lock, flags);
1724 val = musb->a_wait_bcon;
1725 vbus = musb_platform_get_vbus_status(musb);
1726 spin_unlock_irqrestore(&musb->lock, flags);
1742 struct musb *musb = dev_to_musb(dev);
1752 musb_g_wakeup(musb);
1778 struct musb *musb = container_of(data, struct musb, irq_work);
1781 if (musb->xceiv->state != old_state) {
1782 old_state = musb->xceiv->state;
1783 sysfs_notify(&musb->controller->kobj, NULL, "mode");
1791 static struct musb *__init
1795 struct musb *musb;
1806 musb = hcd_to_musb(hcd);
1807 INIT_LIST_HEAD(&musb->control);
1808 INIT_LIST_HEAD(&musb->in_bulk);
1809 INIT_LIST_HEAD(&musb->out_bulk);
1813 musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
1814 musb->a_wait_bcon = OTG_TIME_A_WAIT_BCON;
1816 musb = kzalloc(sizeof *musb, GFP_KERNEL);
1817 if (!musb)
1819 dev_set_drvdata(dev, musb);
1823 musb->mregs = mbase;
1824 musb->ctrl_base = mbase;
1825 musb->nIrq = -ENODEV;
1826 musb->config = config;
1827 BUG_ON(musb->config->num_eps > MUSB_C_NUM_EPS);
1828 for (epnum = 0, ep = musb->endpoints;
1829 epnum < musb->config->num_eps;
1831 ep->musb = musb;
1835 musb->controller = dev;
1836 return musb;
1839 static void musb_free(struct musb *musb)
1847 sysfs_remove_group(&musb->controller->kobj, &musb_attr_group);
1851 musb_gadget_cleanup(musb);
1854 if (musb->nIrq >= 0) {
1855 if (musb->irq_wake)
1856 disable_irq_wake(musb->nIrq);
1857 free_irq(musb->nIrq, musb);
1859 if (is_dma_capable() && musb->dma_controller) {
1860 struct dma_controller *c = musb->dma_controller;
1867 usb_put_hcd(musb_to_hcd(musb));
1869 kfree(musb);
1885 struct musb *musb;
1923 musb = allocate_instance(dev, plat->config, ctrl);
1924 if (!musb) {
1929 spin_lock_init(&musb->lock);
1930 musb->board_mode = plat->mode;
1931 musb->board_set_power = plat->set_power;
1932 musb->set_clock = plat->set_clock;
1933 musb->min_power = plat->min_power;
1941 musb->clock = clk_get(dev, plat->clock);
1942 if (IS_ERR(musb->clock)) {
1943 status = PTR_ERR(musb->clock);
1944 musb->clock = NULL;
1950 * - adjusts musb->mregs and musb->isr if needed,
1952 * - initializes musb->xceiv, usually by otg_get_transceiver()
1955 * - assigns musb->board_set_vbus if host mode is enabled
1962 musb->isr = generic_interrupt;
1963 status = musb_platform_init(musb, plat->board_data);
1967 if (!musb->isr) {
1972 if (!musb->xceiv->io_ops) {
1973 musb->xceiv->io_priv = musb->mregs;
1974 musb->xceiv->io_ops = &musb_ulpi_access;
1981 c = dma_controller_create(musb, musb->mregs);
1982 musb->dma_controller = c;
1988 if (!is_dma_capable() || !musb->dma_controller)
1992 musb_platform_disable(musb);
1993 musb_generic_disable(musb);
1995 /* setup musb parts of the core (especially endpoints) */
1998 : MUSB_CONTROLLER_HDRC, musb);
2003 setup_timer(&musb->otg_timer, musb_otg_timer_func, (unsigned long) musb);
2007 INIT_WORK(&musb->irq_work, musb_irq_work);
2010 if (request_irq(nIrq, musb->isr, 0, dev_name(dev), musb)) {
2015 musb->nIrq = nIrq;
2017 musb->irq_wake = 1;
2020 musb->irq_wake = 0;
2024 if (is_host_enabled(musb)) {
2025 struct usb_hcd *hcd = musb_to_hcd(musb);
2027 otg_set_host(musb->xceiv, &hcd->self);
2029 if (is_otg_enabled(musb))
2031 musb->xceiv->host = &hcd->self;
2036 u8 busctl = musb_read_ulpi_buscontrol(musb->mregs);
2038 musb_write_ulpi_buscontrol(musb->mregs, busctl);
2046 if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
2047 MUSB_HST_MODE(musb);
2048 musb->xceiv->default_a = 1;
2049 musb->xceiv->state = OTG_STATE_A_IDLE;
2051 status = usb_add_hcd(musb_to_hcd(musb), -1, 0);
2055 musb_readb(musb->mregs, MUSB_DEVCTL),
2056 (musb_readb(musb->mregs, MUSB_DEVCTL)
2061 MUSB_DEV_MODE(musb);
2062 musb->xceiv->default_a = 0;
2063 musb->xceiv->state = OTG_STATE_B_IDLE;
2065 status = musb_gadget_setup(musb);
2068 is_otg_enabled(musb) ? "OTG" : "PERIPHERAL",
2070 musb_readb(musb->mregs, MUSB_DEVCTL));
2076 status = musb_init_debugfs(musb);
2081 status = sysfs_create_group(&musb->controller->kobj, &musb_attr_group);
2088 switch (musb->board_mode) {
2094 (is_dma_capable() && musb->dma_controller)
2096 musb->nIrq);
2101 musb_exit_debugfs(musb);
2104 if (!is_otg_enabled(musb) && is_host_enabled(musb))
2105 usb_remove_hcd(musb_to_hcd(musb));
2107 musb_gadget_cleanup(musb);
2110 if (musb->irq_wake)
2112 musb_platform_exit(musb);
2115 if (musb->clock)
2116 clk_put(musb->clock);
2119 dev_err(musb->controller,
2122 musb_free(musb);
2171 struct musb *musb = dev_to_musb(&pdev->dev);
2172 void __iomem *ctrl_base = musb->ctrl_base;
2179 musb_exit_debugfs(musb);
2182 if (musb->board_mode == MUSB_HOST)
2183 usb_remove_hcd(musb_to_hcd(musb));
2185 musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
2186 musb_platform_exit(musb);
2188 musb_free(musb);
2201 void musb_save_context(struct musb *musb)
2204 void __iomem *musb_base = musb->mregs;
2206 if (is_host_enabled(musb)) {
2209 musb_context.busctl = musb_read_ulpi_buscontrol(musb->mregs);
2229 if (musb->dyn_fifo) {
2239 if (is_host_enabled(musb)) {
2267 musb_platform_save_context(musb, &musb_context);
2270 void musb_restore_context(struct musb *musb)
2273 void __iomem *musb_base = musb->mregs;
2276 musb_platform_restore_context(musb, &musb_context);
2278 if (is_host_enabled(musb)) {
2281 musb_write_ulpi_buscontrol(musb->mregs, musb_context.busctl);
2300 if (musb->dyn_fifo) {
2311 if (is_host_enabled(musb)) {
2347 struct musb *musb = dev_to_musb(&pdev->dev);
2349 if (!musb->clock)
2352 spin_lock_irqsave(&musb->lock, flags);
2354 if (is_peripheral_active(musb)) {
2355 } else if (is_host_active(musb)) {
2361 musb_save_context(musb);
2363 if (musb->set_clock)
2364 musb->set_clock(musb->clock, 0);
2366 clk_disable(musb->clock);
2367 spin_unlock_irqrestore(&musb->lock, flags);
2374 struct musb *musb = dev_to_musb(&pdev->dev);
2376 if (!musb->clock)
2379 if (musb->set_clock)
2380 musb->set_clock(musb->clock, 1);
2382 clk_enable(musb->clock);
2384 musb_restore_context(musb);
2429 "musb-dma"