Lines Matching refs:rx
82 /* zero out entire rx state RAM entry for the channel */
83 static void cppi_reset_rx(struct cppi_rx_stateram __iomem *rx)
85 musb_writel(&rx->rx_skipbytes, 0, 0);
86 musb_writel(&rx->rx_head, 0, 0);
87 musb_writel(&rx->rx_sop, 0, 0);
88 musb_writel(&rx->rx_current, 0, 0);
89 musb_writel(&rx->rx_buf_current, 0, 0);
90 musb_writel(&rx->rx_len_len, 0, 0);
91 musb_writel(&rx->rx_cnt_cnt, 0, 0);
165 for (i = 0; i < ARRAY_SIZE(controller->rx); i++) {
166 controller->rx[i].transmit = false;
167 controller->rx[i].index = i;
173 for (i = 0; i < ARRAY_SIZE(controller->rx); i++)
174 cppi_pool_init(controller, controller->rx + i);
179 /* initialise tx/rx channel head pointers to zero */
190 for (i = 0; i < ARRAY_SIZE(controller->rx); i++) {
191 struct cppi_channel *rx_ch = controller->rx + i;
192 struct cppi_rx_stateram __iomem *rx;
196 rx = tibase + DAVINCI_RXCPPI_STATERAM_OFFSET(i);
197 rx_ch->state_ram = rx;
198 cppi_reset_rx(rx);
207 /* enable tx/rx CPPI control */
211 /* disable RNDIS mode, also host rx RNDIS autorequest */
244 for (i = 0; i < ARRAY_SIZE(controller->rx); i++)
245 cppi_pool_free(controller->rx + i);
251 /*disable tx/rx cppi */
308 if (index >= ARRAY_SIZE(controller->rx)) {
312 cppi_ch = controller->rx + index;
355 struct cppi_rx_stateram __iomem *rx = c->state_ram;
368 musb_readl(&rx->rx_skipbytes, 0),
369 musb_readl(&rx->rx_head, 0),
370 musb_readl(&rx->rx_sop, 0),
371 musb_readl(&rx->rx_current, 0),
373 musb_readl(&rx->rx_buf_current, 0),
374 musb_readl(&rx->rx_len_len, 0),
375 musb_readl(&rx->rx_cnt_cnt, 0),
376 musb_readl(&rx->rx_complete, 0)
440 static void cppi_dump_rxq(int level, const char *tag, struct cppi_channel *rx)
447 cppi_dump_rx(level, rx, tag);
448 if (rx->last_processed)
449 cppi_dump_rxbd("last", rx->last_processed);
450 for (bd = rx->head; bd; bd = bd->next)
459 static inline int cppi_autoreq_update(struct cppi_channel *rx,
470 val = tmp & ~((0x3) << (rx->index * 2));
477 val |= ((0x1) << (rx->index * 2));
495 if (n_bds && rx->channel.actual_len) {
496 void __iomem *regs = rx->hw_ep->regs;
724 * try rx rndis mode
742 * @rx: dma channel
755 cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)
757 unsigned maxpacket = rx->maxpacket;
758 dma_addr_t addr = rx->buf_dma + rx->offset;
759 size_t length = rx->buf_len - rx->offset;
765 struct cppi_rx_stateram __iomem *rx_ram = rx->state_ram;
803 n_bds = cppi_autoreq_update(rx, tibase, onepacket, n_bds);
805 cppi_rndis_update(rx, 1, musb->ctrl_base, is_rndis);
811 rx->index, maxpacket,
817 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
819 addr, length, rx->channel.actual_len, rx->buf_len);
824 bd = cppi_bd_alloc(rx);
825 rx->head = bd;
832 bd = cppi_bd_alloc(rx);
848 rx->offset += bd_len;
859 WARNING("rx dma%d -- no BDs? need %d\n", rx->index, n_bds);
862 WARNING("rx dma%d -- only %d of %d BDs\n", rx->index, i, n_bds);
867 bd = rx->head;
868 rx->tail = tail;
882 for (d = rx->head; d; d = d->next)
888 tail = rx->last_processed;
894 core_rxirq_enable(tibase, rx->index + 1);
909 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
914 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
918 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
922 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
926 rx->index, i, n_bds);
928 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
932 cppi_dump_rx(4, rx, "/S");
1002 struct cppi_channel *rx = &cppi->rx[ch];
1003 struct cppi_rx_stateram __iomem *state = rx->state_ram;
1005 struct cppi_descriptor *last = rx->last_processed;
1010 void __iomem *regs = rx->hw_ep->regs;
1012 cppi_dump_rx(6, rx, "/K");
1014 bd = last ? last->next : rx->head;
1033 rx->channel.actual_len);
1051 DBG(3, "rx short %d/%d (%d)\n",
1053 rx->channel.actual_len);
1072 rx->channel.actual_len += len;
1074 cppi_bd_free(rx, last);
1081 rx->last_processed = last;
1087 if (safe2ack == 0 || safe2ack == rx->last_processed->dma)
1090 cppi_bd_free(rx, last);
1091 rx->last_processed = NULL;
1096 WARN_ON(rx->head);
1098 musb_ep_select(cppi->mregs, rx->index + 1);
1102 rx->index,
1103 rx->head, rx->tail,
1104 rx->last_processed
1105 ? rx->last_processed->dma
1109 cppi_dump_rxq(4, "/what?", rx);
1115 rx->head = bd;
1120 csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR);
1127 csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR);
1130 rx->head = NULL;
1131 rx->tail = NULL;
1134 cppi_dump_rx(6, rx, completed ? "/completed" : "/cleaned");
1144 u32 rx, tx;
1155 rx = musb_readl(tibase, DAVINCI_RXCPPI_MASKED_REG);
1157 if (!tx && !rx)
1160 DBG(4, "CPPI IRQ Tx%x Rx%x\n", tx, rx);
1213 * REVISIT use the same ack strategy as rx
1250 for (index = 0; rx; rx = rx >> 1, index++) {
1252 if (rx & 1) {
1255 rx_ch = cppi->rx + index;