Lines Matching defs:xhci
28 #include "xhci.h"
37 static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, gfp_t flags)
45 xhci_dbg(xhci, "Allocating priv segment structure at %p\n", seg);
47 seg->trbs = dma_pool_alloc(xhci->segment_pool, flags, &dma);
52 xhci_dbg(xhci, "// Allocating segment at %p (virtual) 0x%llx (DMA)\n",
62 static void xhci_segment_free(struct xhci_hcd *xhci, struct xhci_segment *seg)
67 xhci_dbg(xhci, "Freeing DMA segment at %p (virtual) 0x%llx (DMA)\n",
69 dma_pool_free(xhci->segment_pool, seg->trbs, seg->dma);
72 xhci_dbg(xhci, "Freeing priv segment structure at %p\n", seg);
83 static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
99 if (xhci_link_trb_quirk(xhci))
103 xhci_dbg(xhci, "Linking segment 0x%llx to segment 0x%llx (DMA)\n",
108 void xhci_ring_free(struct xhci_hcd *xhci, struct xhci_ring *ring)
117 xhci_dbg(xhci, "Freeing ring at %p\n", ring);
120 xhci_segment_free(xhci, seg);
123 xhci_segment_free(xhci, first_seg);
152 static struct xhci_ring *xhci_ring_alloc(struct xhci_hcd *xhci,
159 xhci_dbg(xhci, "Allocating ring at %p\n", ring);
167 ring->first_seg = xhci_segment_alloc(xhci, flags);
176 next = xhci_segment_alloc(xhci, flags);
179 xhci_link_segments(xhci, prev, next, link_trbs);
184 xhci_link_segments(xhci, prev, ring->first_seg, link_trbs);
189 xhci_dbg(xhci, "Wrote link toggle flag to"
197 xhci_ring_free(xhci, ring);
201 void xhci_free_or_cache_endpoint_ring(struct xhci_hcd *xhci,
213 xhci_dbg(xhci, "Cached old ring, "
218 xhci_ring_free(xhci, virt_dev->eps[ep_index].ring);
219 xhci_dbg(xhci, "Ring cache full (%d rings), "
229 static void xhci_reinit_cached_ring(struct xhci_hcd *xhci,
237 xhci_link_segments(xhci, seg, seg->next, 1);
249 static struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci,
258 ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024;
260 ctx->size += CTX_SIZE(xhci->hcc_params);
262 ctx->bytes = dma_pool_alloc(xhci->device_pool, flags, &ctx->dma);
267 static void xhci_free_container_ctx(struct xhci_hcd *xhci,
272 dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma);
276 struct xhci_input_control_ctx *xhci_get_input_control_ctx(struct xhci_hcd *xhci,
283 struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci,
290 (ctx->bytes + CTX_SIZE(xhci->hcc_params));
293 struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci,
303 (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params)));
309 void xhci_free_stream_ctx(struct xhci_hcd *xhci,
313 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
320 return dma_pool_free(xhci->small_streams_pool,
323 return dma_pool_free(xhci->medium_streams_pool,
337 struct xhci_stream_ctx *xhci_alloc_stream_ctx(struct xhci_hcd *xhci,
341 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
348 return dma_pool_alloc(xhci->small_streams_pool,
351 return dma_pool_alloc(xhci->medium_streams_pool,
394 static int xhci_test_radix_tree(struct xhci_hcd *xhci,
412 xhci_warn(xhci, "WARN: DMA address 0x%08llx "
432 xhci_warn(xhci, "WARN: Bad DMA address 0x%08llx "
484 struct xhci_stream_info *xhci_alloc_stream_info(struct xhci_hcd *xhci,
495 xhci_dbg(xhci, "Allocating %u streams and %u "
498 if (xhci->cmd_ring_reserved_trbs == MAX_RSVD_CMD_TRBS) {
499 xhci_dbg(xhci, "Command ring has no reserved TRBs available\n");
502 xhci->cmd_ring_reserved_trbs++;
519 stream_info->stream_ctx_array = xhci_alloc_stream_ctx(xhci,
529 xhci_alloc_command(xhci, true, true, mem_flags);
541 xhci_ring_alloc(xhci, 1, true, mem_flags);
551 xhci_dbg(xhci, "Setting stream %d ring ptr to 0x%08llx\n",
559 xhci_ring_free(xhci, cur_ring);
574 if (xhci_test_radix_tree(xhci, num_streams, stream_info))
587 xhci_ring_free(xhci, cur_ring);
591 xhci_free_command(xhci, stream_info->free_streams_command);
597 xhci->cmd_ring_reserved_trbs--;
604 void xhci_setup_streams_ep_input_ctx(struct xhci_hcd *xhci,
614 xhci_dbg(xhci, "Setting number of stream ctx array entries to %u\n",
627 void xhci_setup_no_streams_ep_input_ctx(struct xhci_hcd *xhci,
642 void xhci_free_stream_info(struct xhci_hcd *xhci,
659 xhci_ring_free(xhci, cur_ring);
663 xhci_free_command(xhci, stream_info->free_streams_command);
664 xhci->cmd_ring_reserved_trbs--;
666 xhci_free_stream_ctx(xhci,
679 static void xhci_init_endpoint_timer(struct xhci_hcd *xhci,
685 ep->xhci = xhci;
689 void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
695 if (slot_id == 0 || !xhci->devs[slot_id])
698 dev = xhci->devs[slot_id];
699 xhci->dcbaa->dev_context_ptrs[slot_id] = 0;
705 xhci_ring_free(xhci, dev->eps[i].ring);
707 xhci_free_stream_info(xhci,
713 xhci_ring_free(xhci, dev->ring_cache[i]);
718 xhci_free_container_ctx(xhci, dev->in_ctx);
720 xhci_free_container_ctx(xhci, dev->out_ctx);
722 kfree(xhci->devs[slot_id]);
723 xhci->devs[slot_id] = NULL;
726 int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
733 if (slot_id == 0 || xhci->devs[slot_id]) {
734 xhci_warn(xhci, "Bad Slot ID %d\n", slot_id);
738 xhci->devs[slot_id] = kzalloc(sizeof(*xhci->devs[slot_id]), flags);
739 if (!xhci->devs[slot_id])
741 dev = xhci->devs[slot_id];
744 dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
748 xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id,
752 dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags);
756 xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id,
761 xhci_init_endpoint_timer(xhci, &dev->eps[i]);
766 dev->eps[0].ring = xhci_ring_alloc(xhci, 1, true, flags);
782 xhci->dcbaa->dev_context_ptrs[slot_id] = dev->out_ctx->dma;
783 xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n",
785 &xhci->dcbaa->dev_context_ptrs[slot_id],
786 (unsigned long long) xhci->dcbaa->dev_context_ptrs[slot_id]);
790 xhci_free_virt_device(xhci, slot_id);
794 void xhci_copy_ep0_dequeue_into_input_ctx(struct xhci_hcd *xhci,
801 virt_dev = xhci->devs[udev->slot_id];
802 ep0_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, 0);
809 int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *udev)
817 dev = xhci->devs[udev->slot_id];
820 xhci_warn(xhci, "Slot ID %d is not assigned to this device\n",
824 ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0);
825 ctrl_ctx = xhci_get_input_control_ctx(xhci, dev->in_ctx);
826 slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);
849 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
861 xhci_dbg(xhci, "Set root hub portnum to %d\n", top_dev->portnum);
871 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt);
872 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport);
890 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
1020 static inline u32 xhci_get_max_esit_payload(struct xhci_hcd *xhci,
1044 int xhci_endpoint_init(struct xhci_hcd *xhci,
1058 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
1069 xhci_ring_alloc(xhci, 8, true, mem_flags);
1072 xhci_ring_alloc(xhci, 1, true, mem_flags);
1081 xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring);
1116 ext_cap_rbv_offset = xhci_find_ext_cap_by_id((void *)xhci->cap_regs,
1121 echrbv = (void *)xhci->cap_regs + ext_cap_rbv_offset;
1122 xhci_dbg(xhci, "ECHRBV: 0x%x\n", xhci_readl(xhci, echrbv));
1124 version = xhci_readl(xhci, echrbv) >> 16;
1128 xhci_warn(xhci, "disable burst on ep %d\n", usb_endpoint_num(&ep->desc));
1133 xhci_warn(xhci, "WARN no SS endpoint bMaxBurst\n");
1154 max_esit_payload = xhci_get_max_esit_payload(xhci, udev, ep);
1162 void xhci_endpoint_zero(struct xhci_hcd *xhci,
1170 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
1185 void xhci_endpoint_copy(struct xhci_hcd *xhci,
1193 out_ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1194 in_ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1207 void xhci_slot_copy(struct xhci_hcd *xhci,
1214 in_slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1215 out_slot_ctx = xhci_get_slot_ctx(xhci, out_ctx);
1224 static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
1227 struct device *dev = xhci_to_hcd(xhci)->self.controller;
1228 int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
1230 xhci_dbg(xhci, "Allocating %d scratchpad buffers\n", num_sp);
1235 xhci->scratchpad = kzalloc(sizeof(*xhci->scratchpad), flags);
1236 if (!xhci->scratchpad)
1239 xhci->scratchpad->sp_array =
1242 &xhci->scratchpad->sp_dma);
1243 if (!xhci->scratchpad->sp_array)
1246 xhci->scratchpad->sp_buffers = kzalloc(sizeof(void *) * num_sp, flags);
1247 if (!xhci->scratchpad->sp_buffers)
1250 xhci->scratchpad->sp_dma_buffers =
1253 if (!xhci->scratchpad->sp_dma_buffers)
1256 xhci->dcbaa->dev_context_ptrs[0] = xhci->scratchpad->sp_dma;
1260 xhci->page_size, &dma);
1264 xhci->scratchpad->sp_array[i] = dma;
1265 xhci->scratchpad->sp_buffers[i] = buf;
1266 xhci->scratchpad->sp_dma_buffers[i] = dma;
1273 pci_free_consistent(to_pci_dev(dev), xhci->page_size,
1274 xhci->scratchpad->sp_buffers[i],
1275 xhci->scratchpad->sp_dma_buffers[i]);
1277 kfree(xhci->scratchpad->sp_dma_buffers);
1280 kfree(xhci->scratchpad->sp_buffers);
1284 xhci->scratchpad->sp_array,
1285 xhci->scratchpad->sp_dma);
1288 kfree(xhci->scratchpad);
1289 xhci->scratchpad = NULL;
1295 static void scratchpad_free(struct xhci_hcd *xhci)
1299 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
1301 if (!xhci->scratchpad)
1304 num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
1307 pci_free_consistent(pdev, xhci->page_size,
1308 xhci->scratchpad->sp_buffers[i],
1309 xhci->scratchpad->sp_dma_buffers[i]);
1311 kfree(xhci->scratchpad->sp_dma_buffers);
1312 kfree(xhci->scratchpad->sp_buffers);
1314 xhci->scratchpad->sp_array,
1315 xhci->scratchpad->sp_dma);
1316 kfree(xhci->scratchpad);
1317 xhci->scratchpad = NULL;
1320 struct xhci_command *xhci_alloc_command(struct xhci_hcd *xhci,
1332 xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT,
1344 xhci_free_container_ctx(xhci, command->in_ctx);
1356 void xhci_urb_free_priv(struct xhci_hcd *xhci, struct urb_priv *urb_priv)
1372 void xhci_free_command(struct xhci_hcd *xhci,
1375 xhci_free_container_ctx(xhci,
1381 void xhci_mem_cleanup(struct xhci_hcd *xhci)
1383 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
1388 if (xhci->ir_set) {
1389 xhci_writel(xhci, 0, &xhci->ir_set->erst_size);
1390 xhci_write_64(xhci, 0, &xhci->ir_set->erst_base);
1391 xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue);
1393 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);
1394 if (xhci->erst.entries)
1396 xhci->erst.entries, xhci->erst.erst_dma_addr);
1397 xhci->erst.entries = NULL;
1398 xhci_dbg(xhci, "Freed ERST\n");
1399 if (xhci->event_ring)
1400 xhci_ring_free(xhci, xhci->event_ring);
1401 xhci->event_ring = NULL;
1402 xhci_dbg(xhci, "Freed event ring\n");
1404 xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring);
1405 if (xhci->cmd_ring)
1406 xhci_ring_free(xhci, xhci->cmd_ring);
1407 xhci->cmd_ring = NULL;
1408 xhci_dbg(xhci, "Freed command ring\n");
1411 xhci_free_virt_device(xhci, i);
1413 if (xhci->segment_pool)
1414 dma_pool_destroy(xhci->segment_pool);
1415 xhci->segment_pool = NULL;
1416 xhci_dbg(xhci, "Freed segment pool\n");
1418 if (xhci->device_pool)
1419 dma_pool_destroy(xhci->device_pool);
1420 xhci->device_pool = NULL;
1421 xhci_dbg(xhci, "Freed device context pool\n");
1423 if (xhci->small_streams_pool)
1424 dma_pool_destroy(xhci->small_streams_pool);
1425 xhci->small_streams_pool = NULL;
1426 xhci_dbg(xhci, "Freed small stream array pool\n");
1428 if (xhci->medium_streams_pool)
1429 dma_pool_destroy(xhci->medium_streams_pool);
1430 xhci->medium_streams_pool = NULL;
1431 xhci_dbg(xhci, "Freed medium stream array pool\n");
1433 xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr);
1434 if (xhci->dcbaa)
1435 pci_free_consistent(pdev, sizeof(*xhci->dcbaa),
1436 xhci->dcbaa, xhci->dcbaa->dma);
1437 xhci->dcbaa = NULL;
1439 scratchpad_free(xhci);
1441 xhci->num_usb2_ports = 0;
1442 xhci->num_usb3_ports = 0;
1443 kfree(xhci->usb2_ports);
1444 kfree(xhci->usb3_ports);
1445 kfree(xhci->port_array);
1447 xhci->page_size = 0;
1448 xhci->page_shift = 0;
1451 static int xhci_test_trb_in_td(struct xhci_hcd *xhci,
1468 xhci_warn(xhci, "WARN: %s TRB math test %d failed!\n",
1470 xhci_warn(xhci, "Tested TRB math w/ seg %p and "
1474 xhci_warn(xhci, "starting TRB %p (0x%llx DMA), "
1478 xhci_warn(xhci, "Expected seg %p, got seg %p\n",
1486 static int xhci_check_trb_in_td_math(struct xhci_hcd *xhci, gfp_t mem_flags)
1495 { xhci->event_ring->first_seg->dma - 16, NULL },
1497 { xhci->event_ring->first_seg->dma - 1, NULL },
1499 { xhci->event_ring->first_seg->dma, xhci->event_ring->first_seg },
1501 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16,
1502 xhci->event_ring->first_seg },
1504 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 1)*16 + 1, NULL },
1506 { xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT)*16, NULL },
1518 { .input_seg = xhci->event_ring->first_seg,
1519 .start_trb = xhci->event_ring->first_seg->trbs,
1520 .end_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1521 .input_dma = xhci->cmd_ring->first_seg->dma,
1525 { .input_seg = xhci->event_ring->first_seg,
1526 .start_trb = xhci->event_ring->first_seg->trbs,
1527 .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1528 .input_dma = xhci->cmd_ring->first_seg->dma,
1532 { .input_seg = xhci->event_ring->first_seg,
1533 .start_trb = xhci->cmd_ring->first_seg->trbs,
1534 .end_trb = &xhci->cmd_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1535 .input_dma = xhci->cmd_ring->first_seg->dma,
1539 { .input_seg = xhci->event_ring->first_seg,
1540 .start_trb = &xhci->event_ring->first_seg->trbs[0],
1541 .end_trb = &xhci->event_ring->first_seg->trbs[3],
1542 .input_dma = xhci->event_ring->first_seg->dma + 4*16,
1546 { .input_seg = xhci->event_ring->first_seg,
1547 .start_trb = &xhci->event_ring->first_seg->trbs[3],
1548 .end_trb = &xhci->event_ring->first_seg->trbs[6],
1549 .input_dma = xhci->event_ring->first_seg->dma + 2*16,
1553 { .input_seg = xhci->event_ring->first_seg,
1554 .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1555 .end_trb = &xhci->event_ring->first_seg->trbs[1],
1556 .input_dma = xhci->event_ring->first_seg->dma + 2*16,
1560 { .input_seg = xhci->event_ring->first_seg,
1561 .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1562 .end_trb = &xhci->event_ring->first_seg->trbs[1],
1563 .input_dma = xhci->event_ring->first_seg->dma + (TRBS_PER_SEGMENT - 4)*16,
1567 { .input_seg = xhci->event_ring->first_seg,
1568 .start_trb = &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 3],
1569 .end_trb = &xhci->event_ring->first_seg->trbs[1],
1570 .input_dma = xhci->cmd_ring->first_seg->dma + 2*16,
1580 ret = xhci_test_trb_in_td(xhci,
1581 xhci->event_ring->first_seg,
1582 xhci->event_ring->first_seg->trbs,
1583 &xhci->event_ring->first_seg->trbs[TRBS_PER_SEGMENT - 1],
1593 ret = xhci_test_trb_in_td(xhci,
1603 xhci_dbg(xhci, "TRB math tests passed.\n");
1607 static void xhci_set_hc_event_deq(struct xhci_hcd *xhci)
1612 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
1613 xhci->event_ring->dequeue);
1615 xhci_warn(xhci, "WARN something wrong with SW event ring "
1618 temp = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
1624 xhci_dbg(xhci, "// Write event ring dequeue pointer, "
1626 xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp,
1627 &xhci->ir_set->erst_dequeue);
1630 static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports,
1637 xhci_warn(xhci, "Ignoring unknown port speed, "
1644 temp = xhci_readl(xhci, addr + 2);
1647 xhci_dbg(xhci, "Ext Cap %p, port offset = %u, "
1657 if (xhci->port_array[i] != 0) {
1658 xhci_warn(xhci, "Duplicate port entry, Ext Cap %p,"
1660 xhci_warn(xhci, "Port was marked as USB %u, "
1662 xhci->port_array[i], major_revision);
1666 if (xhci->port_array[i] != major_revision &&
1667 xhci->port_array[i] != (u8) -1) {
1668 if (xhci->port_array[i] == 0x03)
1669 xhci->num_usb3_ports--;
1671 xhci->num_usb2_ports--;
1672 xhci->port_array[i] = (u8) -1;
1676 xhci->port_array[i] = major_revision;
1678 xhci->num_usb3_ports++;
1680 xhci->num_usb2_ports++;
1691 static int xhci_setup_port_arrays(struct xhci_hcd *xhci, gfp_t flags)
1698 addr = &xhci->cap_regs->hcc_params;
1699 offset = XHCI_HCC_EXT_CAPS(xhci_readl(xhci, addr));
1701 xhci_err(xhci, "No Extended Capability registers, "
1706 num_ports = HCS_MAX_PORTS(xhci->hcs_params1);
1707 xhci->port_array = kzalloc(sizeof(*xhci->port_array)*num_ports, flags);
1708 if (!xhci->port_array)
1716 addr = &xhci->cap_regs->hc_capbase + offset;
1720 cap_id = xhci_readl(xhci, addr);
1722 xhci_add_in_port(xhci, num_ports, addr,
1725 if (!offset || (xhci->num_usb2_ports + xhci->num_usb3_ports)
1735 if (xhci->num_usb2_ports == 0 && xhci->num_usb3_ports == 0) {
1736 xhci_warn(xhci, "No ports on the roothubs?\n");
1739 xhci_dbg(xhci, "Found %u USB 2.0 ports and %u USB 3.0 ports.\n",
1740 xhci->num_usb2_ports, xhci->num_usb3_ports);
1745 if (xhci->num_usb2_ports) {
1746 xhci->usb2_ports = kmalloc(sizeof(*xhci->usb2_ports)*
1747 xhci->num_usb2_ports, flags);
1748 if (!xhci->usb2_ports)
1753 if (xhci->port_array[i] == 0x03 ||
1754 xhci->port_array[i] == 0 ||
1755 xhci->port_array[i] == -1)
1758 xhci->usb2_ports[port_index] =
1759 &xhci->op_regs->port_status_base +
1761 xhci_dbg(xhci, "USB 2.0 port at index %u, "
1763 xhci->usb2_ports[port_index]);
1767 if (xhci->num_usb3_ports) {
1768 xhci->usb3_ports = kmalloc(sizeof(*xhci->usb3_ports)*
1769 xhci->num_usb3_ports, flags);
1770 if (!xhci->usb3_ports)
1775 if (xhci->port_array[i] == 0x03) {
1776 xhci->usb3_ports[port_index] =
1777 &xhci->op_regs->port_status_base +
1779 xhci_dbg(xhci, "USB 3.0 port at index %u, "
1781 xhci->usb3_ports[port_index]);
1788 int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
1791 struct device *dev = xhci_to_hcd(xhci)->self.controller;
1798 page_size = xhci_readl(xhci, &xhci->op_regs->page_size);
1799 xhci_dbg(xhci, "Supported page size register = 0x%x\n", page_size);
1806 xhci_dbg(xhci, "Supported page size of %iK\n", (1 << (i+12)) / 1024);
1808 xhci_warn(xhci, "WARN: no supported page size\n");
1810 xhci->page_shift = 12;
1811 xhci->page_size = 1 << xhci->page_shift;
1812 xhci_dbg(xhci, "HCD page size set to %iK\n", xhci->page_size / 1024);
1818 val = HCS_MAX_SLOTS(xhci_readl(xhci, &xhci->cap_regs->hcs_params1));
1819 xhci_dbg(xhci, "// xHC can handle at most %d device slots.\n",
1821 val2 = xhci_readl(xhci, &xhci->op_regs->config_reg);
1823 xhci_dbg(xhci, "// Setting Max device slots reg = 0x%x.\n",
1825 xhci_writel(xhci, val, &xhci->op_regs->config_reg);
1831 xhci->dcbaa = pci_alloc_consistent(to_pci_dev(dev),
1832 sizeof(*xhci->dcbaa), &dma);
1833 if (!xhci->dcbaa)
1835 memset(xhci->dcbaa, 0, sizeof *(xhci->dcbaa));
1836 xhci->dcbaa->dma = dma;
1837 xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n",
1838 (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);
1839 xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);
1847 xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
1848 SEGMENT_SIZE, 64, xhci->page_size);
1851 xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev,
1852 2112, 64, xhci->page_size);
1853 if (!xhci->segment_pool || !xhci->device_pool)
1859 xhci->small_streams_pool =
1862 xhci->medium_streams_pool =
1869 if (!xhci->small_streams_pool || !xhci->medium_streams_pool)
1873 xhci->cmd_ring = xhci_ring_alloc(xhci, 1, true, flags);
1874 if (!xhci->cmd_ring)
1876 xhci_dbg(xhci, "Allocated command ring at %p\n", xhci->cmd_ring);
1877 xhci_dbg(xhci, "First segment DMA is 0x%llx\n",
1878 (unsigned long long)xhci->cmd_ring->first_seg->dma);
1881 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
1883 (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |
1884 xhci->cmd_ring->cycle_state;
1885 xhci_dbg(xhci, "// Setting command ring address to 0x%x\n", val);
1886 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
1887 xhci_dbg_cmd_ptrs(xhci);
1889 val = xhci_readl(xhci, &xhci->cap_regs->db_off);
1891 xhci_dbg(xhci, "// Doorbell array is located at offset 0x%x"
1893 xhci->dba = (void *) xhci->cap_regs + val;
1894 xhci_dbg_regs(xhci);
1895 xhci_print_run_regs(xhci);
1897 xhci->ir_set = (void *) xhci->run_regs->ir_set;
1903 xhci_dbg(xhci, "// Allocating event ring\n");
1904 xhci->event_ring = xhci_ring_alloc(xhci, ERST_NUM_SEGS, false, flags);
1905 if (!xhci->event_ring)
1907 if (xhci_check_trb_in_td_math(xhci, flags) < 0)
1910 xhci->erst.entries = pci_alloc_consistent(to_pci_dev(dev),
1912 if (!xhci->erst.entries)
1914 xhci_dbg(xhci, "// Allocated event ring segment table at 0x%llx\n",
1917 memset(xhci->erst.entries, 0, sizeof(struct xhci_erst_entry)*ERST_NUM_SEGS);
1918 xhci->erst.num_entries = ERST_NUM_SEGS;
1919 xhci->erst.erst_dma_addr = dma;
1920 xhci_dbg(xhci, "Set ERST to 0; private num segs = %i, virt addr = %p, dma addr = 0x%llx\n",
1921 xhci->erst.num_entries,
1922 xhci->erst.entries,
1923 (unsigned long long)xhci->erst.erst_dma_addr);
1926 for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) {
1927 struct xhci_erst_entry *entry = &xhci->erst.entries[val];
1935 val = xhci_readl(xhci, &xhci->ir_set->erst_size);
1938 xhci_dbg(xhci, "// Write ERST size = %i to ir_set 0 (some bits preserved)\n",
1940 xhci_writel(xhci, val, &xhci->ir_set->erst_size);
1942 xhci_dbg(xhci, "// Set ERST entries to point to event ring.\n");
1944 xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n",
1945 (unsigned long long)xhci->erst.erst_dma_addr);
1946 val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);
1948 val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
1949 xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);
1952 xhci_set_hc_event_deq(xhci);
1953 xhci_dbg(xhci, "Wrote ERST address to ir_set 0.\n");
1954 xhci_print_ir_set(xhci, xhci->ir_set, 0);
1956 init_completion(&xhci->addr_dev);
1958 xhci->devs[i] = NULL;
1960 if (scratchpad_alloc(xhci, flags))
1962 if (xhci_setup_port_arrays(xhci, flags))
1968 xhci_warn(xhci, "Couldn't initialize memory\n");
1969 xhci_mem_cleanup(xhci);