Lines Matching refs:sl811_write
104 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
105 sl811_write(sl811, SL11H_IRQ_STATUS, ~0);
117 sl811_write(sl811, SL11H_CTLREG1, SL11H_CTL1MASK_SE0);
121 sl811_write(sl811, SL11H_IRQ_ENABLE, 0);
122 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
123 sl811_write(sl811, SL811HS_CTLREG2, SL811HS_CTL2_INIT);
124 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
160 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
166 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
188 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0);
197 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
228 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
233 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control);
271 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr);
276 sl811_write(sl811, bank + SL11H_HOSTCTLREG,
601 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
612 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
635 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
693 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
696 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
700 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG), 0);
710 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG), 0);
749 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
949 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
989 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1003 sl811_write(sl811, SL811_EP_B(SL11H_HOSTCTLREG),
1133 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1156 sl811_write(sl811, SL11H_IRQ_STATUS, irqstat);
1186 sl811_write(sl811, SL11H_SOFLOWREG, 0xe0);
1187 sl811_write(sl811, SL811HS_CTLREG2, ctrl2);
1190 sl811_write(sl811, SL811_EP_A(SL11H_BUFLNTHREG), 0);
1193 sl811_write(sl811, SL811_EP_A(SL11H_HOSTCTLREG),
1200 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1203 sl811_write(sl811, SL11H_IRQ_ENABLE, sl811->irq_enable);
1241 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1243 sl811_write(sl811, SL11H_IRQ_ENABLE,
1253 sl811_write(sl811, SL11H_IRQ_ENABLE,
1256 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1303 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);
1316 sl811_write(sl811, SL11H_IRQ_ENABLE,
1319 sl811_write(sl811, SL11H_CTLREG1, sl811->ctrl1);