Lines Matching refs:r8a66597
44 #include "r8a66597.h"
55 static void packet_write(struct r8a66597 *r8a66597, u16 pipenum);
59 static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
64 tmp = r8a66597_read(r8a66597, INTENB0);
65 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, INTENB0);
66 r8a66597_bset(r8a66597, 1 << pipenum, reg);
67 r8a66597_write(r8a66597, tmp, INTENB0);
71 static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
76 tmp = r8a66597_read(r8a66597, INTENB0);
77 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE, INTENB0);
78 r8a66597_bclr(r8a66597, 1 << pipenum, reg);
79 r8a66597_write(r8a66597, tmp, INTENB0);
82 static void set_devadd_reg(struct r8a66597 *r8a66597, u8 r8a66597_address,
89 r8a66597_write(r8a66597, val, devadd_reg);
92 static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
97 if (r8a66597->pdata->on_chip) {
99 clk_enable(r8a66597->clk);
102 r8a66597_write(r8a66597, SCKE, SYSCFG0);
103 tmp = r8a66597_read(r8a66597, SYSCFG0);
105 printk(KERN_ERR "r8a66597: reg access fail.\n");
109 r8a66597_write(r8a66597, 0x04, 0x02);
112 r8a66597_write(r8a66597, USBE, SYSCFG0);
113 tmp = r8a66597_read(r8a66597, SYSCFG0);
115 printk(KERN_ERR "r8a66597: reg access fail.\n");
119 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
120 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
124 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
127 tmp = r8a66597_read(r8a66597, SYSCFG0);
129 printk(KERN_ERR "r8a66597: reg access fail.\n");
138 static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
140 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
143 if (r8a66597->pdata->on_chip) {
145 clk_disable(r8a66597->clk);
148 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
149 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
150 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
154 static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
159 r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
160 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
162 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
163 r8a66597_bclr(r8a66597, DTCHE, get_intenb_reg(port));
164 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
167 static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
171 r8a66597_write(r8a66597, 0, get_intenb_reg(port));
172 r8a66597_write(r8a66597, 0, get_intsts_reg(port));
174 r8a66597_port_power(r8a66597, port, 0);
177 tmp = r8a66597_read(r8a66597, SOFCFG) & EDGESTS;
182 r8a66597_bclr(r8a66597, val, get_syscfg_reg(port));
183 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
186 static int enable_controller(struct r8a66597 *r8a66597)
189 u16 vif = r8a66597->pdata->vif ? LDRV : 0;
190 u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0;
191 u16 endian = r8a66597->pdata->endian ? BIGEND : 0;
193 ret = r8a66597_clock_enable(r8a66597);
197 r8a66597_bset(r8a66597, vif & LDRV, PINCFG);
198 r8a66597_bset(r8a66597, USBE, SYSCFG0);
200 r8a66597_bset(r8a66597, BEMPE | NRDYE | BRDYE, INTENB0);
201 r8a66597_bset(r8a66597, irq_sense & INTL, SOFCFG);
202 r8a66597_bset(r8a66597, BRDY0, BRDYENB);
203 r8a66597_bset(r8a66597, BEMP0, BEMPENB);
205 r8a66597_bset(r8a66597, endian & BIGEND, CFIFOSEL);
206 r8a66597_bset(r8a66597, endian & BIGEND, D0FIFOSEL);
207 r8a66597_bset(r8a66597, endian & BIGEND, D1FIFOSEL);
208 r8a66597_bset(r8a66597, TRNENSEL, SOFCFG);
210 r8a66597_bset(r8a66597, SIGNE | SACKE, INTENB1);
212 for (port = 0; port < r8a66597->max_root_hub; port++)
213 r8a66597_enable_port(r8a66597, port);
218 static void disable_controller(struct r8a66597 *r8a66597)
223 r8a66597_write(r8a66597, 0, INTENB0);
224 r8a66597_write(r8a66597, 0, INTENB1);
225 r8a66597_write(r8a66597, 0, BRDYENB);
226 r8a66597_write(r8a66597, 0, BEMPENB);
227 r8a66597_write(r8a66597, 0, NRDYENB);
230 r8a66597_write(r8a66597, 0, BRDYSTS);
231 r8a66597_write(r8a66597, 0, NRDYSTS);
232 r8a66597_write(r8a66597, 0, BEMPSTS);
234 for (port = 0; port < r8a66597->max_root_hub; port++)
235 r8a66597_disable_port(r8a66597, port);
237 r8a66597_clock_disable(r8a66597);
240 static int get_parent_r8a66597_address(struct r8a66597 *r8a66597,
265 static void get_port_number(struct r8a66597 *r8a66597,
270 if (*root_port >= r8a66597->max_root_hub)
271 printk(KERN_ERR "r8a66597: Illegal root port number.\n");
292 printk(KERN_ERR "r8a66597: unknown speed\n");
299 static void set_child_connect_map(struct r8a66597 *r8a66597, int address)
304 r8a66597->child_connect_map[idx] |= 1 << (address % 32);
307 static void put_child_connect_map(struct r8a66597 *r8a66597, int address)
312 r8a66597->child_connect_map[idx] &= ~(1 << (address % 32));
344 get_urb_to_r8a66597_dev(struct r8a66597 *r8a66597, struct urb *urb)
347 return &r8a66597->device0;
352 static int make_r8a66597_device(struct r8a66597 *r8a66597,
370 list_add_tail(&dev->device_list, &r8a66597->child_device);
372 get_port_number(r8a66597, urb->dev->devpath,
375 r8a66597->root_hub[dev->root_port].dev = dev;
377 set_devadd_reg(r8a66597, dev->address,
379 get_parent_r8a66597_address(r8a66597, urb->dev),
386 static u8 alloc_usb_address(struct r8a66597 *r8a66597, struct urb *urb)
396 dev = get_urb_to_r8a66597_dev(r8a66597, urb);
401 if (r8a66597->address_map & (1 << addr))
405 r8a66597->address_map |= 1 << addr;
407 if (make_r8a66597_device(r8a66597, urb, addr) < 0)
415 r8a66597->address_map);
421 static void free_usb_address(struct r8a66597 *r8a66597,
432 r8a66597->address_map &= ~(1 << dev->address);
444 for (port = 0; port < r8a66597->max_root_hub; port++) {
445 if (r8a66597->root_hub[port].dev == dev) {
446 r8a66597->root_hub[port].dev = NULL;
452 static void r8a66597_reg_wait(struct r8a66597 *r8a66597, unsigned long reg,
459 tmp = r8a66597_read(r8a66597, reg);
461 printk(KERN_ERR "r8a66597: register%lx, loop %x "
470 static void pipe_start(struct r8a66597 *r8a66597, struct r8a66597_pipe *pipe)
474 tmp = r8a66597_read(r8a66597, pipe->pipectr) & PID;
476 r8a66597_mdfy(r8a66597, PID_NAK, PID, pipe->pipectr);
477 r8a66597_mdfy(r8a66597, PID_BUF, PID, pipe->pipectr);
481 static void pipe_stop(struct r8a66597 *r8a66597, struct r8a66597_pipe *pipe)
485 tmp = r8a66597_read(r8a66597, pipe->pipectr) & PID;
487 r8a66597_mdfy(r8a66597, PID_STALL, PID, pipe->pipectr);
488 r8a66597_mdfy(r8a66597, PID_NAK, PID, pipe->pipectr);
489 r8a66597_reg_wait(r8a66597, pipe->pipectr, PBUSY, 0);
493 static void clear_all_buffer(struct r8a66597 *r8a66597,
501 pipe_stop(r8a66597, pipe);
502 r8a66597_bset(r8a66597, ACLRM, pipe->pipectr);
503 tmp = r8a66597_read(r8a66597, pipe->pipectr);
504 tmp = r8a66597_read(r8a66597, pipe->pipectr);
505 tmp = r8a66597_read(r8a66597, pipe->pipectr);
506 r8a66597_bclr(r8a66597, ACLRM, pipe->pipectr);
510 static void r8a66597_pipe_toggle(struct r8a66597 *r8a66597,
514 r8a66597_bset(r8a66597, SQSET, pipe->pipectr);
516 r8a66597_bset(r8a66597, SQCLR, pipe->pipectr);
519 static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
521 if (r8a66597->pdata->on_chip)
528 static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum)
530 unsigned short mbw = mbw_value(r8a66597);
532 r8a66597_mdfy(r8a66597, mbw | pipenum, mbw | CURPIPE, CFIFOSEL);
533 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum);
537 static inline void fifo_change_from_pipe(struct r8a66597 *r8a66597,
540 unsigned short mbw = mbw_value(r8a66597);
542 cfifo_change(r8a66597, 0);
543 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D0FIFOSEL);
544 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D1FIFOSEL);
546 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum, mbw | CURPIPE,
548 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum);
561 static u16 get_urb_to_r8a66597_addr(struct r8a66597 *r8a66597, struct urb *urb)
563 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
578 static void pipe_toggle_set(struct r8a66597 *r8a66597,
582 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
596 static void pipe_toggle_save(struct r8a66597 *r8a66597,
600 if (r8a66597_read(r8a66597, pipe->pipectr) & SQMON)
601 pipe_toggle_set(r8a66597, pipe, urb, 1);
603 pipe_toggle_set(r8a66597, pipe, urb, 0);
607 static void pipe_toggle_restore(struct r8a66597 *r8a66597,
611 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
618 r8a66597_pipe_toggle(r8a66597, pipe, *toggle & (1 << endpoint));
622 static void pipe_buffer_setting(struct r8a66597 *r8a66597,
630 r8a66597_bset(r8a66597, ACLRM, get_pipectr_addr(info->pipenum));
631 r8a66597_bclr(r8a66597, ACLRM, get_pipectr_addr(info->pipenum));
632 r8a66597_write(r8a66597, info->pipenum, PIPESEL);
638 r8a66597_write(r8a66597, val, PIPECFG);
640 r8a66597_write(r8a66597, (info->buf_bsize << 10) | (info->bufnum),
642 r8a66597_write(r8a66597, make_devsel(info->address) | info->maxpacket,
644 r8a66597_write(r8a66597, info->interval, PIPEPERI);
648 static void pipe_setting(struct r8a66597 *r8a66597, struct r8a66597_td *td)
655 cfifo_change(r8a66597, 0);
656 pipe_buffer_setting(r8a66597, info);
661 r8a66597_pipe_toggle(r8a66597, td->pipe, 0);
662 pipe_toggle_set(r8a66597, td->pipe, urb, 0);
663 clear_all_buffer(r8a66597, td->pipe);
667 pipe_toggle_restore(r8a66597, td->pipe, urb);
672 static u16 get_empty_pipenum(struct r8a66597 *r8a66597,
702 printk(KERN_ERR "r8a66597: Illegal type\n");
709 if (r8a66597->pipe_cnt[min] > r8a66597->pipe_cnt[array[i]])
732 printk(KERN_ERR "r8a66597: Illegal type\n");
751 printk(KERN_ERR "r8a66597: Illegal pipenum (%d)\n", pipenum);
767 printk(KERN_ERR "r8a66597: Illegal pipenum (%d)\n", pipenum);
773 static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597,
780 unsigned short mbw = mbw_value(r8a66597);
783 if (r8a66597->pdata->on_chip)
788 if ((r8a66597->dma_map & (1 << i)) != 0)
798 r8a66597->dma_map |= 1 << i;
802 cfifo_change(r8a66597, 0);
803 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum,
806 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE,
808 r8a66597_bset(r8a66597, BCLR, pipe->fifoctr);
815 static void enable_r8a66597_pipe(struct r8a66597 *r8a66597, struct urb *urb,
819 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
826 r8a66597->pipe_cnt[pipe->info.pipenum]++;
829 enable_r8a66597_pipe_dma(r8a66597, dev, pipe, urb);
832 static void r8a66597_urb_done(struct r8a66597 *r8a66597, struct urb *urb,
834 __releases(r8a66597->lock)
835 __acquires(r8a66597->lock)
846 usb_hcd_unlink_urb_from_ep(r8a66597_to_hcd(r8a66597), urb);
847 spin_unlock(&r8a66597->lock);
848 usb_hcd_giveback_urb(r8a66597_to_hcd(r8a66597), urb, status);
849 spin_lock(&r8a66597->lock);
853 static void force_dequeue(struct r8a66597 *r8a66597, u16 pipenum, u16 address)
857 struct list_head *list = &r8a66597->pipe_queue[pipenum];
871 r8a66597_urb_done(r8a66597, urb, -ENODEV);
878 static void disable_r8a66597_pipe_all(struct r8a66597 *r8a66597,
893 force_dequeue(r8a66597, 0, dev->address);
896 r8a66597->pipe_cnt[pipenum] -= dev->pipe_cnt[pipenum];
898 force_dequeue(r8a66597, pipenum, dev->address);
903 r8a66597->dma_map &= ~(dev->dma_map);
953 static void init_pipe_info(struct r8a66597 *r8a66597, struct urb *urb,
959 info.pipenum = get_empty_pipenum(r8a66597, ep);
960 info.address = get_urb_to_r8a66597_addr(r8a66597, urb);
978 enable_r8a66597_pipe(r8a66597, urb, hep, &info);
981 static void init_pipe_config(struct r8a66597 *r8a66597, struct urb *urb)
985 dev = get_urb_to_r8a66597_dev(r8a66597, urb);
989 static void pipe_irq_enable(struct r8a66597 *r8a66597, struct urb *urb,
993 enable_irq_empty(r8a66597, pipenum);
995 enable_irq_ready(r8a66597, pipenum);
998 enable_irq_nrdy(r8a66597, pipenum);
1001 static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
1003 disable_irq_ready(r8a66597, pipenum);
1004 disable_irq_nrdy(r8a66597, pipenum);
1007 static void r8a66597_root_hub_start_polling(struct r8a66597 *r8a66597)
1009 mod_timer(&r8a66597->rh_timer,
1013 static void start_root_hub_sampling(struct r8a66597 *r8a66597, int port,
1016 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
1018 rh->old_syssts = r8a66597_read(r8a66597, get_syssts_reg(port)) & LNST;
1026 r8a66597_root_hub_start_polling(r8a66597);
1030 static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port,
1032 __releases(r8a66597->lock)
1033 __acquires(r8a66597->lock)
1036 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port));
1037 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
1040 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
1042 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
1044 r8a66597_write(r8a66597, ~DTCH, get_intsts_reg(port));
1045 r8a66597_bset(r8a66597, DTCHE, get_intenb_reg(port));
1047 if (r8a66597->bus_suspended)
1048 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1051 spin_unlock(&r8a66597->lock);
1052 usb_hcd_poll_rh_status(r8a66597_to_hcd(r8a66597));
1053 spin_lock(&r8a66597->lock);
1057 static void r8a66597_usb_connect(struct r8a66597 *r8a66597, int port)
1059 u16 speed = get_rh_usb_speed(r8a66597, port);
1060 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
1073 static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597, int port)
1075 struct r8a66597_device *dev = r8a66597->root_hub[port].dev;
1077 disable_r8a66597_pipe_all(r8a66597, dev);
1078 free_usb_address(r8a66597, dev, 0);
1080 start_root_hub_sampling(r8a66597, port, 0);
1084 static void prepare_setup_packet(struct r8a66597 *r8a66597,
1091 r8a66597_write(r8a66597, make_devsel(td->address) | td->maxpacket,
1093 r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
1096 r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
1099 r8a66597_write(r8a66597, SUREQ, DCPCTR);
1103 static void prepare_packet_read(struct r8a66597 *r8a66597,
1109 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
1110 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
1111 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1113 r8a66597_pipe_toggle(r8a66597, td->pipe, 1);
1114 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
1116 pipe_irq_disable(r8a66597, td->pipenum);
1117 pipe_start(r8a66597, td->pipe);
1118 pipe_irq_enable(r8a66597, urb, td->pipenum);
1121 pipe_irq_disable(r8a66597, td->pipenum);
1122 pipe_setting(r8a66597, td);
1123 pipe_stop(r8a66597, td->pipe);
1124 r8a66597_write(r8a66597, ~(1 << td->pipenum), BRDYSTS);
1127 r8a66597_write(r8a66597, TRCLR,
1129 r8a66597_write(r8a66597,
1134 r8a66597_bset(r8a66597, TRENB,
1138 pipe_start(r8a66597, td->pipe);
1139 pipe_irq_enable(r8a66597, urb, td->pipenum);
1145 static void prepare_packet_write(struct r8a66597 *r8a66597,
1152 pipe_stop(r8a66597, td->pipe);
1153 r8a66597_bset(r8a66597, R8A66597_DIR, DCPCFG);
1154 r8a66597_mdfy(r8a66597, ISEL, ISEL | CURPIPE, CFIFOSEL);
1155 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1157 r8a66597_pipe_toggle(r8a66597, td->pipe, 1);
1158 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
1162 pipe_setting(r8a66597, td);
1164 r8a66597_bclr(r8a66597, TRENB, td->pipe->pipetre);
1166 r8a66597_write(r8a66597, ~(1 << td->pipenum), BRDYSTS);
1168 fifo_change_from_pipe(r8a66597, td->pipe);
1169 tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);
1171 pipe_irq_enable(r8a66597, urb, td->pipenum);
1173 packet_write(r8a66597, td->pipenum);
1174 pipe_start(r8a66597, td->pipe);
1178 static void prepare_status_packet(struct r8a66597 *r8a66597,
1183 r8a66597_pipe_toggle(r8a66597, td->pipe, 1);
1184 pipe_stop(r8a66597, td->pipe);
1187 r8a66597_bset(r8a66597, R8A66597_DIR, DCPCFG);
1188 r8a66597_mdfy(r8a66597, ISEL, ISEL | CURPIPE, CFIFOSEL);
1189 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1190 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
1191 r8a66597_write(r8a66597, BCLR | BVAL, CFIFOCTR);
1192 enable_irq_empty(r8a66597, 0);
1194 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
1195 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
1196 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
1197 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
1198 enable_irq_ready(r8a66597, 0);
1200 enable_irq_nrdy(r8a66597, 0);
1201 pipe_start(r8a66597, td->pipe);
1214 static int start_transfer(struct r8a66597 *r8a66597, struct r8a66597_td *td)
1222 td->urb->setup_packet[2] = alloc_usb_address(r8a66597,
1227 prepare_setup_packet(r8a66597, td);
1230 prepare_packet_read(r8a66597, td);
1233 prepare_packet_write(r8a66597, td);
1236 prepare_status_packet(r8a66597, td);
1239 printk(KERN_ERR "r8a66597: invalid type.\n");
1262 static void set_td_timer(struct r8a66597 *r8a66597, struct r8a66597_td *td)
1268 if (!list_empty(&r8a66597->pipe_queue[td->pipenum]) &&
1270 r8a66597->timeout_map |= 1 << td->pipenum;
1281 mod_timer(&r8a66597->td_timer[td->pipenum],
1287 static void finish_request(struct r8a66597 *r8a66597, struct r8a66597_td *td,
1289 __releases(r8a66597->lock) __acquires(r8a66597->lock)
1292 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
1294 r8a66597->timeout_map &= ~(1 << pipenum);
1298 r8a66597->address_map &= ~(1 << urb->setup_packet[2]);
1300 pipe_toggle_save(r8a66597, td->pipe, urb);
1305 if (!list_empty(&r8a66597->pipe_queue[pipenum]))
1312 r8a66597_urb_done(r8a66597, urb, status);
1316 td = r8a66597_get_td(r8a66597, pipenum);
1320 start_transfer(r8a66597, td);
1321 set_td_timer(r8a66597, td);
1325 static void packet_read(struct r8a66597 *r8a66597, u16 pipenum)
1330 struct r8a66597_td *td = r8a66597_get_td(r8a66597, pipenum);
1339 fifo_change_from_pipe(r8a66597, td->pipe);
1340 tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);
1342 pipe_stop(r8a66597, td->pipe);
1343 pipe_irq_disable(r8a66597, pipenum);
1344 printk(KERN_ERR "r8a66597: in fifo not ready (%d)\n", pipenum);
1345 finish_request(r8a66597, td, pipenum, td->urb, -EPIPE);
1384 pipe_stop(r8a66597, td->pipe);
1385 pipe_irq_disable(r8a66597, pipenum);
1392 r8a66597_write(r8a66597, BCLR, td->pipe->fifoctr);
1394 r8a66597_read_fifo(r8a66597, td->pipe->fifoaddr,
1399 finish_request(r8a66597, td, pipenum, urb, status);
1402 static void packet_write(struct r8a66597 *r8a66597, u16 pipenum)
1407 struct r8a66597_td *td = r8a66597_get_td(r8a66597, pipenum);
1414 fifo_change_from_pipe(r8a66597, td->pipe);
1415 tmp = r8a66597_read(r8a66597, td->pipe->fifoctr);
1417 pipe_stop(r8a66597, td->pipe);
1418 pipe_irq_disable(r8a66597, pipenum);
1419 printk(KERN_ERR "r8a66597: out fifo not ready (%d)\n", pipenum);
1420 finish_request(r8a66597, td, pipenum, urb, -EPIPE);
1439 r8a66597_write(r8a66597, ~(1 << pipenum), BEMPSTS);
1441 r8a66597_write_fifo(r8a66597, td->pipe->fifoaddr, buf, size);
1443 r8a66597_write(r8a66597, BVAL, td->pipe->fifoctr);
1456 disable_irq_ready(r8a66597, pipenum);
1457 enable_irq_empty(r8a66597, pipenum);
1459 enable_irq_nrdy(r8a66597, pipenum);
1461 pipe_irq_enable(r8a66597, urb, pipenum);
1465 static void check_next_phase(struct r8a66597 *r8a66597, int status)
1467 struct r8a66597_td *td = r8a66597_get_td(r8a66597, 0);
1495 finish_request(r8a66597, td, 0, urb, status);
1497 start_transfer(r8a66597, td);
1500 static int get_urb_error(struct r8a66597 *r8a66597, u16 pipenum)
1502 struct r8a66597_td *td = r8a66597_get_td(r8a66597, pipenum);
1505 u16 pid = r8a66597_read(r8a66597, td->pipe->pipectr) & PID;
1515 static void irq_pipe_ready(struct r8a66597 *r8a66597)
1522 mask = r8a66597_read(r8a66597, BRDYSTS)
1523 & r8a66597_read(r8a66597, BRDYENB);
1524 r8a66597_write(r8a66597, ~mask, BRDYSTS);
1526 td = r8a66597_get_td(r8a66597, 0);
1528 packet_read(r8a66597, 0);
1530 pipe_irq_disable(r8a66597, 0);
1531 check_next_phase(r8a66597, 0);
1537 td = r8a66597_get_td(r8a66597, pipenum);
1542 packet_read(r8a66597, pipenum);
1544 packet_write(r8a66597, pipenum);
1549 static void irq_pipe_empty(struct r8a66597 *r8a66597)
1557 mask = r8a66597_read(r8a66597, BEMPSTS)
1558 & r8a66597_read(r8a66597, BEMPENB);
1559 r8a66597_write(r8a66597, ~mask, BEMPSTS);
1561 cfifo_change(r8a66597, 0);
1562 td = r8a66597_get_td(r8a66597, 0);
1564 disable_irq_empty(r8a66597, 0);
1565 check_next_phase(r8a66597, 0);
1572 td = r8a66597_get_td(r8a66597, pipenum);
1576 tmp = r8a66597_read(r8a66597, td->pipe->pipectr);
1578 disable_irq_empty(r8a66597, pipenum);
1579 pipe_irq_disable(r8a66597, pipenum);
1580 finish_request(r8a66597, td, pipenum, td->urb,
1587 static void irq_pipe_nrdy(struct r8a66597 *r8a66597)
1594 mask = r8a66597_read(r8a66597, NRDYSTS)
1595 & r8a66597_read(r8a66597, NRDYENB);
1596 r8a66597_write(r8a66597, ~mask, NRDYSTS);
1598 cfifo_change(r8a66597, 0);
1599 status = get_urb_error(r8a66597, 0);
1600 pipe_irq_disable(r8a66597, 0);
1601 check_next_phase(r8a66597, status);
1608 td = r8a66597_get_td(r8a66597, pipenum);
1612 status = get_urb_error(r8a66597, pipenum);
1613 pipe_irq_disable(r8a66597, pipenum);
1614 pipe_stop(r8a66597, td->pipe);
1615 finish_request(r8a66597, td, pipenum, td->urb, status);
1622 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1628 spin_lock(&r8a66597->lock);
1630 intsts0 = r8a66597_read(r8a66597, INTSTS0);
1631 intsts1 = r8a66597_read(r8a66597, INTSTS1);
1632 intsts2 = r8a66597_read(r8a66597, INTSTS2);
1633 intenb0 = r8a66597_read(r8a66597, INTENB0);
1634 intenb1 = r8a66597_read(r8a66597, INTENB1);
1635 intenb2 = r8a66597_read(r8a66597, INTENB2);
1642 r8a66597_write(r8a66597, ~ATTCH, INTSTS2);
1643 r8a66597_bclr(r8a66597, ATTCHE, INTENB2);
1646 start_root_hub_sampling(r8a66597, 1, 1);
1649 r8a66597_write(r8a66597, ~DTCH, INTSTS2);
1650 r8a66597_bclr(r8a66597, DTCHE, INTENB2);
1651 r8a66597_usb_disconnect(r8a66597, 1);
1654 r8a66597_write(r8a66597, ~BCHG, INTSTS2);
1655 r8a66597_bclr(r8a66597, BCHGE, INTENB2);
1656 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1662 r8a66597_write(r8a66597, ~ATTCH, INTSTS1);
1663 r8a66597_bclr(r8a66597, ATTCHE, INTENB1);
1666 start_root_hub_sampling(r8a66597, 0, 1);
1669 r8a66597_write(r8a66597, ~DTCH, INTSTS1);
1670 r8a66597_bclr(r8a66597, DTCHE, INTENB1);
1671 r8a66597_usb_disconnect(r8a66597, 0);
1674 r8a66597_write(r8a66597, ~BCHG, INTSTS1);
1675 r8a66597_bclr(r8a66597, BCHGE, INTENB1);
1676 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1680 r8a66597_write(r8a66597, ~SIGN, INTSTS1);
1681 status = get_urb_error(r8a66597, 0);
1682 check_next_phase(r8a66597, status);
1685 r8a66597_write(r8a66597, ~SACK, INTSTS1);
1686 check_next_phase(r8a66597, 0);
1691 irq_pipe_ready(r8a66597);
1693 irq_pipe_empty(r8a66597);
1695 irq_pipe_nrdy(r8a66597);
1698 spin_unlock(&r8a66597->lock);
1703 static void r8a66597_root_hub_control(struct r8a66597 *r8a66597, int port)
1706 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
1711 tmp = r8a66597_read(r8a66597, dvstctr_reg);
1713 r8a66597_mdfy(r8a66597, UACT, USBRST | UACT,
1715 r8a66597_root_hub_start_polling(r8a66597);
1717 r8a66597_usb_connect(r8a66597, port);
1721 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port));
1722 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
1726 tmp = r8a66597_read(r8a66597, get_syssts_reg(port)) & LNST;
1730 r8a66597_check_syssts(r8a66597, port, tmp);
1732 r8a66597_root_hub_start_polling(r8a66597);
1736 r8a66597_root_hub_start_polling(r8a66597);
1743 struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597;
1748 spin_lock_irqsave(&r8a66597->lock, flags);
1751 if (!(r8a66597->interval_map & (1 << pipenum)))
1753 if (timer_pending(&r8a66597->interval_timer[pipenum]))
1756 td = r8a66597_get_td(r8a66597, pipenum);
1758 start_transfer(r8a66597, td);
1761 spin_unlock_irqrestore(&r8a66597->lock, flags);
1766 struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597;
1772 spin_lock_irqsave(&r8a66597->lock, flags);
1774 if (!(r8a66597->timeout_map & (1 << pipenum)))
1776 if (timer_pending(&r8a66597->td_timer[pipenum]))
1779 td = r8a66597_get_td(r8a66597, pipenum);
1781 r8a66597->timeout_map &= ~(1 << pipenum);
1786 set_td_timer(r8a66597, td);
1791 pipe_stop(r8a66597, pipe);
1796 &r8a66597->pipe_queue[pipenum]);
1797 new_td = r8a66597_get_td(r8a66597, pipenum);
1804 start_transfer(r8a66597, new_td);
1807 r8a66597->timeout_map &= ~(1 << pipenum);
1809 set_td_timer(r8a66597, new_td);
1812 spin_unlock_irqrestore(&r8a66597->lock, flags);
1817 struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597;
1821 spin_lock_irqsave(&r8a66597->lock, flags);
1823 for (port = 0; port < r8a66597->max_root_hub; port++)
1824 r8a66597_root_hub_control(r8a66597, port);
1826 spin_unlock_irqrestore(&r8a66597->lock, flags);
1829 static int check_pipe_config(struct r8a66597 *r8a66597, struct urb *urb)
1831 struct r8a66597_device *dev = get_urb_to_r8a66597_dev(r8a66597, urb);
1842 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1845 return enable_controller(r8a66597);
1850 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1852 disable_controller(r8a66597);
1855 static void set_address_zero(struct r8a66597 *r8a66597, struct urb *urb)
1861 get_port_number(r8a66597, urb->dev->devpath,
1863 set_devadd_reg(r8a66597, 0,
1865 get_parent_r8a66597_address(r8a66597, urb->dev),
1870 static struct r8a66597_td *r8a66597_make_td(struct r8a66597 *r8a66597,
1885 td->address = get_urb_to_r8a66597_addr(r8a66597, urb);
1904 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1909 spin_lock_irqsave(&r8a66597->lock, flags);
1910 if (!get_urb_to_r8a66597_dev(r8a66597, urb)) {
1928 init_pipe_info(r8a66597, urb, hep, &hep->desc);
1931 if (unlikely(check_pipe_config(r8a66597, urb)))
1932 init_pipe_config(r8a66597, urb);
1934 set_address_zero(r8a66597, urb);
1935 td = r8a66597_make_td(r8a66597, urb, hep);
1940 if (list_empty(&r8a66597->pipe_queue[td->pipenum]))
1942 list_add_tail(&td->queue, &r8a66597->pipe_queue[td->pipenum]);
1947 r8a66597->interval_map |= 1 << td->pipenum;
1948 mod_timer(&r8a66597->interval_timer[td->pipenum],
1952 ret = start_transfer(r8a66597, td);
1959 set_td_timer(r8a66597, td);
1965 spin_unlock_irqrestore(&r8a66597->lock, flags);
1972 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
1977 spin_lock_irqsave(&r8a66597->lock, flags);
1984 pipe_stop(r8a66597, td->pipe);
1985 pipe_irq_disable(r8a66597, td->pipenum);
1986 disable_irq_empty(r8a66597, td->pipenum);
1987 finish_request(r8a66597, td, td->pipenum, urb, status);
1990 spin_unlock_irqrestore(&r8a66597->lock, flags);
1997 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2014 spin_lock_irqsave(&r8a66597->lock, flags);
2015 pipe_stop(r8a66597, pipe);
2016 pipe_irq_disable(r8a66597, pipenum);
2017 disable_irq_empty(r8a66597, pipenum);
2018 td = r8a66597_get_td(r8a66597, pipenum);
2021 finish_request(r8a66597, td, pipenum, urb, -ESHUTDOWN);
2024 spin_unlock_irqrestore(&r8a66597->lock, flags);
2029 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2030 return r8a66597_read(r8a66597, FRMNUM) & 0x03FF;
2051 static struct r8a66597_device *get_r8a66597_device(struct r8a66597 *r8a66597,
2055 struct list_head *list = &r8a66597->child_device;
2064 printk(KERN_ERR "r8a66597: get_r8a66597_device fail.(%d)\n", addr);
2068 static void update_usb_address_map(struct r8a66597 *r8a66597,
2077 diff = r8a66597->child_connect_map[i] ^ map[i];
2087 set_child_connect_map(r8a66597, addr);
2091 spin_lock_irqsave(&r8a66597->lock, flags);
2092 dev = get_r8a66597_device(r8a66597, addr);
2093 disable_r8a66597_pipe_all(r8a66597, dev);
2094 free_usb_address(r8a66597, dev, 0);
2095 put_child_connect_map(r8a66597, addr);
2096 spin_unlock_irqrestore(&r8a66597->lock, flags);
2102 static void r8a66597_check_detect_child(struct r8a66597 *r8a66597,
2118 update_usb_address_map(r8a66597, bus->root_hub, now_map);
2124 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2128 r8a66597_check_detect_child(r8a66597, hcd);
2130 spin_lock_irqsave(&r8a66597->lock, flags);
2134 for (i = 0; i < r8a66597->max_root_hub; i++) {
2135 if (r8a66597->root_hub[i].port & 0xffff0000)
2139 spin_unlock_irqrestore(&r8a66597->lock, flags);
2144 static void r8a66597_hub_descriptor(struct r8a66597 *r8a66597,
2149 desc->bNbrPorts = r8a66597->max_root_hub;
2153 desc->bitmap[0] = ((1 << r8a66597->max_root_hub) - 1) << 1;
2160 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2163 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2168 spin_lock_irqsave(&r8a66597->lock, flags);
2181 if (wIndex > r8a66597->max_root_hub)
2193 r8a66597_port_power(r8a66597, port, 0);
2207 r8a66597_hub_descriptor(r8a66597,
2214 if (wIndex > r8a66597->max_root_hub)
2219 if (wIndex > r8a66597->max_root_hub)
2228 r8a66597_port_power(r8a66597, port, 1);
2236 disable_r8a66597_pipe_all(r8a66597, dev);
2237 free_usb_address(r8a66597, dev, 1);
2239 r8a66597_mdfy(r8a66597, USBRST, USBRST | UACT,
2241 mod_timer(&r8a66597->rh_timer,
2256 spin_unlock_irqrestore(&r8a66597->lock, flags);
2263 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2268 for (port = 0; port < r8a66597->max_root_hub; port++) {
2269 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2276 r8a66597_bclr(r8a66597, UACT, dvstctr_reg); /* suspend */
2281 r8a66597_bset(r8a66597, RWUPE, dvstctr_reg);
2282 r8a66597_write(r8a66597, ~BCHG, get_intsts_reg(port));
2283 r8a66597_bset(r8a66597, BCHGE, get_intenb_reg(port));
2287 r8a66597->bus_suspended = 1;
2294 struct r8a66597 *r8a66597 = hcd_to_r8a66597(hcd);
2299 for (port = 0; port < r8a66597->max_root_hub; port++) {
2300 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2309 r8a66597_mdfy(r8a66597, RESUME, RESUME | UACT, dvstctr_reg);
2311 r8a66597_mdfy(r8a66597, UACT, RESUME | UACT, dvstctr_reg);
2324 .hcd_priv_size = sizeof(struct r8a66597),
2359 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2364 disable_controller(r8a66597);
2366 for (port = 0; port < r8a66597->max_root_hub; port++) {
2367 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2377 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2378 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
2382 enable_controller(r8a66597);
2402 struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev);
2403 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
2405 del_timer_sync(&r8a66597->rh_timer);
2407 iounmap(r8a66597->reg);
2409 if (r8a66597->pdata->on_chip)
2410 clk_put(r8a66597->clk);
2425 struct r8a66597 *r8a66597;
2474 r8a66597 = hcd_to_r8a66597(hcd);
2475 memset(r8a66597, 0, sizeof(struct r8a66597));
2476 dev_set_drvdata(&pdev->dev, r8a66597);
2477 r8a66597->pdata = pdev->dev.platform_data;
2478 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW;
2480 if (r8a66597->pdata->on_chip) {
2483 r8a66597->clk = clk_get(&pdev->dev, clk_name);
2484 if (IS_ERR(r8a66597->clk)) {
2487 ret = PTR_ERR(r8a66597->clk);
2491 r8a66597->max_root_hub = 1;
2493 r8a66597->max_root_hub = 2;
2495 spin_lock_init(&r8a66597->lock);
2496 init_timer(&r8a66597->rh_timer);
2497 r8a66597->rh_timer.function = r8a66597_timer;
2498 r8a66597->rh_timer.data = (unsigned long)r8a66597;
2499 r8a66597->reg = reg;
2502 ret = r8a66597_clock_enable(r8a66597);
2505 disable_controller(r8a66597);
2508 INIT_LIST_HEAD(&r8a66597->pipe_queue[i]);
2509 init_timer(&r8a66597->td_timer[i]);
2510 r8a66597->td_timer[i].function = r8a66597_td_timer;
2511 r8a66597->td_timer[i].data = (unsigned long)r8a66597;
2512 setup_timer(&r8a66597->interval_timer[i],
2514 (unsigned long)r8a66597);
2516 INIT_LIST_HEAD(&r8a66597->child_device);
2530 if (r8a66597->pdata->on_chip)
2531 clk_put(r8a66597->clk);