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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/usb/host/

Lines Matching refs:ed

88 /* search for the right schedule branch to use for a periodic ed.
125 static void periodic_link (struct ohci_hcd *ohci, struct ed *ed)
130 (ed->hwINFO & cpu_to_hc32 (ohci, ED_ISO)) ? "iso " : "",
131 ed, ed->branch, ed->load, ed->interval);
133 for (i = ed->branch; i < NUM_INTS; i += ed->interval) {
134 struct ed **prev = &ohci->periodic [i];
136 struct ed *here = *prev;
142 while (here && ed != here) {
143 if (ed->interval > here->interval)
149 if (ed != here) {
150 ed->ed_next = here;
152 ed->hwNextED = *prev_p;
154 *prev = ed;
155 *prev_p = cpu_to_hc32(ohci, ed->dma);
158 ohci->load [i] += ed->load;
160 ohci_to_hcd(ohci)->self.bandwidth_allocated += ed->load / ed->interval;
163 /* link an ed into one of the HC chains */
165 static int ed_schedule (struct ohci_hcd *ohci, struct ed *ed)
169 ed->state = ED_OPER;
170 ed->ed_prev = NULL;
171 ed->ed_next = NULL;
172 ed->hwNextED = 0;
174 && (ed->type == PIPE_INTERRUPT)
189 switch (ed->type) {
193 ohci_writel (ohci, ed->dma,
196 ohci->ed_controltail->ed_next = ed;
198 ed->dma);
200 ed->ed_prev = ohci->ed_controltail;
208 ohci->ed_controltail = ed;
214 ohci_writel (ohci, ed->dma, &ohci->regs->ed_bulkhead);
216 ohci->ed_bulktail->ed_next = ed;
218 ed->dma);
220 ed->ed_prev = ohci->ed_bulktail;
228 ohci->ed_bulktail = ed;
234 branch = balance (ohci, ed->interval, ed->load);
238 branch, ed->interval, ed->load);
241 ed->branch = branch;
242 periodic_link (ohci, ed);
254 static void periodic_unlink (struct ohci_hcd *ohci, struct ed *ed)
258 for (i = ed->branch; i < NUM_INTS; i += ed->interval) {
259 struct ed *temp;
260 struct ed **prev = &ohci->periodic [i];
263 while (*prev && (temp = *prev) != ed) {
268 *prev_p = ed->hwNextED;
269 *prev = ed->ed_next;
271 ohci->load [i] -= ed->load;
273 ohci_to_hcd(ohci)->self.bandwidth_allocated -= ed->load / ed->interval;
276 (ed->hwINFO & cpu_to_hc32 (ohci, ED_ISO)) ? "iso " : "",
277 ed, ed->branch, ed->load, ed->interval);
280 /* unlink an ed from one of the HC chains.
281 * just the link to the ed is unlinked.
282 * the link from the ed still points to another operational ed or 0
283 * so the HC can eventually finish the processing of the unlinked ed
302 static void ed_deschedule (struct ohci_hcd *ohci, struct ed *ed)
304 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP);
306 ed->state = ED_UNLINK;
318 switch (ed->type) {
321 if (ed->ed_prev == NULL) {
322 if (!ed->hwNextED) {
329 hc32_to_cpup (ohci, &ed->hwNextED),
332 ed->ed_prev->ed_next = ed->ed_next;
333 ed->ed_prev->hwNextED = ed->hwNextED;
336 if (ohci->ed_controltail == ed) {
337 ohci->ed_controltail = ed->ed_prev;
340 } else if (ed->ed_next) {
341 ed->ed_next->ed_prev = ed->ed_prev;
347 if (ed->ed_prev == NULL) {
348 if (!ed->hwNextED) {
355 hc32_to_cpup (ohci, &ed->hwNextED),
358 ed->ed_prev->ed_next = ed->ed_next;
359 ed->ed_prev->hwNextED = ed->hwNextED;
362 if (ohci->ed_bulktail == ed) {
363 ohci->ed_bulktail = ed->ed_prev;
366 } else if (ed->ed_next) {
367 ed->ed_next->ed_prev = ed->ed_prev;
374 periodic_unlink (ohci, ed);
385 static struct ed *ed_get (
392 struct ed *ed;
397 if (!(ed = ep->hcpriv)) {
402 ed = ed_alloc (ohci, GFP_ATOMIC);
403 if (!ed) {
408 /* dummy td; end of td list for ed */
412 ed_free (ohci, ed);
413 ed = NULL;
416 ed->dummy = td;
417 ed->hwTailP = cpu_to_hc32 (ohci, td->td_dma);
418 ed->hwHeadP = ed->hwTailP; /* ED_C, ED_H zeroed */
419 ed->state = ED_IDLE;
424 ed->type = usb_pipetype(pipe);
431 if (ed->type != PIPE_CONTROL) {
433 if (ed->type != PIPE_BULK) {
435 if (ed->type == PIPE_ISOCHRONOUS)
439 ed->interval = interval;
440 ed->load = usb_calc_bus_time (
442 ed->type == PIPE_ISOCHRONOUS,
447 ed->hwINFO = cpu_to_hc32(ohci, info);
449 ep->hcpriv = ed;
454 return ed;
463 * and that ed->state is ED_OPER
465 static void start_ed_unlink (struct ohci_hcd *ohci, struct ed *ed)
467 ed->hwINFO |= cpu_to_hc32 (ohci, ED_DEQUEUE);
468 ed_deschedule (ohci, ed);
471 ed->ed_next = ohci->ed_rm_list;
472 ed->ed_prev = NULL;
473 ohci->ed_rm_list = ed;
486 ed->tick = ohci_frame_no(ohci) + 1;
527 td = urb_priv->td [index] = urb_priv->ed->dummy;
528 urb_priv->ed->dummy = td_pt;
530 td->ed = urb_priv->ed;
543 td->ed->last_iso = info & 0xffff;
554 list_add_tail (&td->td_list, &td->ed->td_list);
563 td->ed->hwTailP = td->hwNextTD;
592 urb_priv->ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_C);
607 switch (urb_priv->ed->type) {
639 if (urb_priv->ed->type == PIPE_BULK) {
789 struct ed *ed = td->ed;
791 __hc32 toggle = ed->hwHeadP & cpu_to_hc32 (ohci, ED_C);
793 /* clear ed halt; this is the td that caused it, but keep it inactive
796 ed->hwINFO |= cpu_to_hc32 (ohci, ED_SKIP);
798 ed->hwHeadP &= ~cpu_to_hc32 (ohci, ED_H);
802 * Also patch the ed so it looks as if those tds completed normally.
804 while (tmp != &ed->td_list) {
815 * in that segment (TD_R clear), this ed halted because
823 ed->hwHeadP = next->hwNextTD | toggle;
864 * prepend to ours. ed->td_list changes later.
883 && (td->ed->hwHeadP & cpu_to_hc32 (ohci, ED_H)))
899 struct ed *ed, **last;
902 for (last = &ohci->ed_rm_list, ed = *last; ed != NULL; ed = *last) {
911 if (tick_before (tick, ed->tick)) {
913 last = &ed->ed_next;
917 if (!list_empty (&ed->td_list)) {
921 td = list_entry (ed->td_list.next, struct td,
923 head = hc32_to_cpu (ohci, ed->hwHeadP) &
928 if (ed == ohci->ed_to_check)
940 *last = ed->ed_next;
941 ed->ed_next = NULL;
948 * When we get here, the HC doesn't see this ed. But it
954 prev = &ed->hwHeadP;
955 list_for_each_safe (entry, tmp, &ed->td_list) {
982 ed->hwHeadP &= ~cpu_to_hc32(ohci, ED_C);
984 ed->hwHeadP |= cpu_to_hc32(ohci, ED_C);
996 if (completed && !list_empty (&ed->td_list))
1000 ed->state = ED_IDLE;
1001 if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT)
1003 ed->hwHeadP &= ~cpu_to_hc32(ohci, ED_H);
1004 ed->hwNextED = 0;
1006 ed->hwINFO &= ~cpu_to_hc32 (ohci, ED_SKIP | ED_DEQUEUE);
1009 if (!list_empty (&ed->td_list)) {
1011 ed_schedule (ohci, ed);
1075 struct ed *ed = td->ed;
1087 if (list_empty(&ed->td_list)) {
1088 if (ed->state == ED_OPER)
1089 start_ed_unlink(ohci, ed);
1092 } else if ((ed->hwINFO & cpu_to_hc32(ohci, ED_SKIP | ED_DEQUEUE))
1094 td = list_entry(ed->td_list.next, struct td, td_list);
1096 ed->hwINFO &= ~cpu_to_hc32(ohci, ED_SKIP);
1098 switch (ed->type) {