Lines Matching refs:UDCCR
80 tmp = udc_readl(udc, UDCCR);
171 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
325 * - we rely on UDCCR register "active interface" and "active altsetting".
413 * udc_set_mask_UDCCR - set bits in UDCCR
415 * @mask: bits to set in UDCCR
417 * Sets bits in UDCCR, leaving DME and FST bits as they were.
421 u32 udccr = udc_readl(udc, UDCCR);
422 udc_writel(udc, UDCCR,
427 * udc_clear_mask_UDCCR - clears bits in UDCCR
429 * @mask: bit to clear in UDCCR
431 * Clears bits in UDCCR, leaving DME and FST bits as they were.
435 u32 udccr = udc_readl(udc, UDCCR);
436 udc_writel(udc, UDCCR,
443 * @mask: bits to set in UDCCR
584 * Find the physical pxa27x ep, and setup its UDCCR
599 udc_ep_writel(ep, UDCCR, new_udccr);
1524 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1739 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
2290 u32 udccr = udc_readl(udc, UDCCR);
2314 u32 udccr = udc_readl(udc, UDCCR);
2345 u32 udccr = udc_readl(udc, UDCCR);
2349 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2524 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2540 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2554 ep->udccr_value = udc_ep_readl(ep, UDCCR);
2570 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc
2584 udc_ep_writel(ep, UDCCR, ep->udccr_value);