Lines Matching refs:psccr
632 j->psccr.bits.dev = 3;
633 j->psccr.bits.rw = 1;
634 outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
691 j->psccr.bits.dev = 3;
692 j->psccr.bits.rw = 0;
693 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
1726 j->psccr.bits.addr = 6; /* R/W Smart Cable Register Address */
1727 j->psccr.bits.rw = 0; /* Read / Write flag */
1728 j->psccr.bits.dev = 0;
1730 outb(j->psccr.byte, j->XILINXbase + 0x01);
1751 j->psccr.bits.addr = 7; /* R/W Smart Cable Register Address */
1752 j->psccr.bits.rw = 0; /* Read / Write flag */
1753 j->psccr.bits.dev = 0;
1755 outb(j->psccr.byte, j->XILINXbase + 0x01);
1774 j->psccr.bits.dev = 3;
1775 j->psccr.bits.rw = 1;
1776 outw_p(j->psccr.byte << 8, j->XILINXbase + 0x00);
1780 j->psccr.bits.dev = 3;
1781 j->psccr.bits.rw = 0;
1782 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
1819 j->psccr.bits.dev = 3;
1820 j->psccr.bits.rw = 1;
1821 outb_p(j->psccr.byte, j->XILINXbase + 0x01);
1843 j->psccr.bits.addr = 1; /* R/W Smart Cable Register Address */
1844 j->psccr.bits.rw = 0; /* Read / Write flag */
1845 j->psccr.bits.dev = 0;
1847 outb(j->psccr.byte, j->XILINXbase + 0x01);
1855 j->psccr.bits.addr = 2; /* R/W Smart Cable Register Address */
1856 j->psccr.bits.rw = 0; /* Read / Write flag */
1857 j->psccr.bits.dev = 0;
1859 outb(j->psccr.byte, j->XILINXbase + 0x01);
1862 j->psccr.bits.addr = 3; /* R/W Smart Cable Register Address */
1863 j->psccr.bits.rw = 0; /* Read / Write flag */
1864 j->psccr.bits.dev = 0;
1866 outb(j->psccr.byte, j->XILINXbase + 0x01);
1869 j->psccr.bits.addr = 4; /* R/W Smart Cable Register Address */
1870 j->psccr.bits.rw = 0; /* Read / Write flag */
1871 j->psccr.bits.dev = 0;
1873 outb(j->psccr.byte, j->XILINXbase + 0x01);
1882 j->psccr.bits.addr = 5; /* R/W Smart Cable Register Address */
1883 j->psccr.bits.rw = 0; /* Read / Write flag */
1884 j->psccr.bits.dev = 0;
1886 outb(j->psccr.byte, j->XILINXbase + 0x01);
1893 j->psccr.bits.addr = 9; /* R/W Smart Cable Register Address */
1894 j->psccr.bits.rw = 0; /* Read / Write flag */
1895 j->psccr.bits.dev = 0;
1897 outb(j->psccr.byte, j->XILINXbase + 0x01);
1901 j->psccr.byte = j->pslic.byte = 0;
1903 j->psccr.bits.dev = 3;
1904 j->psccr.bits.rw = 0;
1905 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);
2134 j->psccr.bits.dev = 3;
2135 j->psccr.bits.rw = 0;
2136 outw_p(j->psccr.byte << 8 | j->pslic.byte, j->XILINXbase + 0x00);