Lines Matching refs:dwIoBase
71 * dwIoBase - I/O base address
79 unsigned char SROMbyReadEmbedded(unsigned long dwIoBase, unsigned char byContntOffset)
87 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
89 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY)));
91 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID);
92 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset);
95 VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMR);
98 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
108 VNSvInPortB(dwIoBase + MAC_REG_I2MDIPT, &byData);
109 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);
119 * dwIoBase - I/O base address
128 bool SROMbWriteEmbedded(unsigned long dwIoBase, unsigned char byContntOffset, unsigned char byData)
135 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
137 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY)));
139 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID);
140 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset);
141 VNSvOutPortB(dwIoBase + MAC_REG_I2MDOPT, byData);
144 VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMW);
147 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
159 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);
162 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);
172 * dwIoBase - I/O base address
181 void SROMvRegBitsOn(unsigned long dwIoBase, unsigned char byContntOffset, unsigned char byBits)
185 byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset);
186 SROMbWriteEmbedded(dwIoBase, byContntOffset,(unsigned char)(byOrgData | byBits));
195 * dwIoBase - I/O base address
202 void SROMvRegBitsOff(unsigned long dwIoBase, unsigned char byContntOffset, unsigned char byBits)
206 byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset);
207 SROMbWriteEmbedded(dwIoBase, byContntOffset,(unsigned char)(byOrgData & (~byBits)));
216 * dwIoBase - I/O base address
225 bool SROMbIsRegBitsOn(unsigned long dwIoBase, unsigned char byContntOffset, unsigned char byTestBits)
229 byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset);
239 * dwIoBase - I/O base address
248 bool SROMbIsRegBitsOff(unsigned long dwIoBase, unsigned char byContntOffset, unsigned char byTestBits)
252 byOrgData = SROMbyReadEmbedded(dwIoBase, byContntOffset);
262 * dwIoBase - I/O base address
269 void SROMvReadAllContents(unsigned long dwIoBase, unsigned char *pbyEepromRegs)
275 *pbyEepromRegs = SROMbyReadEmbedded(dwIoBase,(unsigned char) ii);
286 * dwIoBase - I/O base address
294 void SROMvWriteAllContents(unsigned long dwIoBase, unsigned char *pbyEepromRegs)
300 SROMbWriteEmbedded(dwIoBase,(unsigned char) ii, *pbyEepromRegs);
311 * dwIoBase - I/O base address
318 void SROMvReadEtherAddress(unsigned long dwIoBase, unsigned char *pbyEtherAddress)
324 *pbyEtherAddress = SROMbyReadEmbedded(dwIoBase, ii);
335 * dwIoBase - I/O base address
343 void SROMvWriteEtherAddress(unsigned long dwIoBase, unsigned char *pbyEtherAddress)
349 SROMbWriteEmbedded(dwIoBase, ii, *pbyEtherAddress);
360 * dwIoBase - I/O base address
367 void SROMvReadSubSysVenId(unsigned long dwIoBase, unsigned long *pdwSubSysVenId)
373 *pbyData = SROMbyReadEmbedded(dwIoBase, 6);
374 *(pbyData+1) = SROMbyReadEmbedded(dwIoBase, 7);
376 *(pbyData+2) = SROMbyReadEmbedded(dwIoBase, 8);
377 *(pbyData+3) = SROMbyReadEmbedded(dwIoBase, 9);
385 * dwIoBase - I/O base address
392 bool SROMbAutoLoad(unsigned long dwIoBase)
399 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg);
401 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg | I2MCFG_NORETRY));
403 MACvRegBitsOn(dwIoBase, MAC_REG_I2MCSR, I2MCSR_AUTOLD);
407 MACvTimer0MicroSDelay(dwIoBase, CB_EEPROM_READBYTE_WAIT);
408 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait);
413 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg);