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  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/vt6655/

Lines Matching refs:dwIoBase

470  *      dwIoBase    - I/O base address
477 bool s_bAL7230Init (unsigned long dwIoBase)
485 VNSvOutPortB(dwIoBase + MAC_REG_SOFTPWRCTL, 0);
487 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI |
489 BBvPowerSaveModeOFF(dwIoBase); //RobertYu:20050106, have DC value for Calibration
492 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[ii]);
495 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
498 MACvTimer0MicroSDelay(dwIoBase, 150);//150us
499 bResult &= IFRFbWriteEmbeded(dwIoBase, (0x9ABA8F00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW)); //TXDCOC:active, RCK:diable
500 MACvTimer0MicroSDelay(dwIoBase, 30);//30us
501 bResult &= IFRFbWriteEmbeded(dwIoBase, (0x3ABA8F00+(BY_AL7230_REG_LEN<<3)+IFREGCTL_REGW)); //TXDCOC:diable, RCK:active
502 MACvTimer0MicroSDelay(dwIoBase, 30);//30us
503 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[CB_AL7230_INIT_SEQ-1]); //TXDCOC:diable, RCK:diable
505 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 |
510 BBvPowerSaveModeON(dwIoBase); // RobertYu:20050106
514 VNSvOutPortB(dwIoBase + MAC_REG_PSPWRSIG, (PSSIG_WPE3 | PSSIG_WPE2)); //1100 0000
520 bool s_bAL7230SelectChannel (unsigned long dwIoBase, unsigned char byChannel)
527 MACvWordRegBitsOff(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
529 bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL7230ChannelTable0[byChannel-1]); //Reg0
530 bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL7230ChannelTable1[byChannel-1]); //Reg1
531 bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL7230ChannelTable2[byChannel-1]); //Reg4
534 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
537 VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel & 0x7F));
538 MACvTimer0MicroSDelay(dwIoBase, SWITCH_CHANNEL_DELAY_AL7230);
540 VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel | 0x80));
550 * dwIoBase - I/O base address
566 * dwIoBase - I/O base address
584 * dwIoBase - I/O base address
597 * dwIoBase - I/O base address
617 * dwIoBase - I/O base address
625 bool IFRFbWriteEmbeded (unsigned long dwIoBase, unsigned long dwData)
630 VNSvOutPortD(dwIoBase + MAC_REG_IFREGCTL, dwData);
634 VNSvInPortD(dwIoBase + MAC_REG_IFREGCTL, &dwValue);
653 * dwIoBase - I/O base address
666 * dwIoBase - I/O base address
680 * dwIoBase - I/O base address
687 bool RFbAL2230Init (unsigned long dwIoBase)
695 VNSvOutPortB(dwIoBase + MAC_REG_SOFTPWRCTL, 0);
697 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI |
702 MACvWordRegBitsOff(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
708 IFRFbWriteEmbeded(dwIoBase, (0x07168700+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW));
712 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL2230InitTable[ii]);
714 MACvTimer0MicroSDelay(dwIoBase, 30); //delay 30 us
717 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3);
719 MACvTimer0MicroSDelay(dwIoBase, 150);//150us
720 bResult &= IFRFbWriteEmbeded(dwIoBase, (0x00d80f00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW));
721 MACvTimer0MicroSDelay(dwIoBase, 30);//30us
722 bResult &= IFRFbWriteEmbeded(dwIoBase, (0x00780f00+(BY_AL2230_REG_LEN<<3)+IFREGCTL_REGW));
723 MACvTimer0MicroSDelay(dwIoBase, 30);//30us
724 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL2230InitTable[CB_AL2230_INIT_SEQ-1]);
726 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 |
732 VNSvOutPortB(dwIoBase + MAC_REG_PSPWRSIG, (PSSIG_WPE3 | PSSIG_WPE2)); //1100 0000
737 bool RFbAL2230SelectChannel (unsigned long dwIoBase, unsigned char byChannel)
743 bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL2230ChannelTable0[byChannel-1]);
744 bResult &= IFRFbWriteEmbeded (dwIoBase, dwAL2230ChannelTable1[byChannel-1]);
747 VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel & 0x7F));
748 MACvTimer0MicroSDelay(dwIoBase, SWITCH_CHANNEL_DELAY_AL2230);
750 VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel | 0x80));
760 * dwIoBase - I/O base address
774 * dwIoBase - I/O base address
788 * dwIoBase - I/O base address
878 bool RFbSelectChannel (unsigned long dwIoBase, unsigned char byRFType, unsigned char byChannel)
885 bResult = RFbAL2230SelectChannel(dwIoBase, byChannel);
889 bResult = s_bAL7230SelectChannel(dwIoBase, byChannel);
907 * dwIoBase - I/O base address
914 bool RFvWriteWakeProgSyn (unsigned long dwIoBase, unsigned char byRFType, unsigned int uChannel)
920 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, 0);
935 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230InitTable[ii]);
937 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230ChannelTable0[uChannel-1]);
939 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230ChannelTable1[uChannel-1]);
954 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230InitTable[ii]);
960 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230InitTableAMode[ii]);
964 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable0[uChannel-1]);
966 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable1[uChannel-1]);
968 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable2[uChannel-1]);
981 MACvSetMISCFifo(dwIoBase, MISCFIFO_SYNINFO_IDX, (unsigned long )MAKEWORD(bySleepCount, byInitCount));
991 * dwIoBase - I/O base address
1088 * dwIoBase - I/O base address
1194 bool RFbAL7230SelectChannelPostProcess (unsigned long dwIoBase, unsigned char byOldChannel, unsigned char byNewChannel)
1206 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[2]); //Reg2
1207 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[3]); //Reg3
1208 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[5]); //Reg5
1209 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[7]); //Reg7
1210 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[10]);//Reg10
1211 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[12]);//Reg12
1212 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTableAMode[15]);//Reg15
1217 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[2]); //Reg2
1218 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[3]); //Reg3
1219 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[5]); //Reg5
1220 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[7]); //Reg7
1221 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[10]);//Reg10
1222 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[12]);//Reg12
1223 bResult &= IFRFbWriteEmbeded(dwIoBase, dwAL7230InitTable[15]);//Reg15