Lines Matching defs:Cache
89 struct flash_cache_tag Cache;
447 Cache.array[i].address = NAND_CACHE_INIT_ADDR;
448 Cache.array[i].use_cnt = 0;
449 Cache.array[i].changed = CLEAR;
450 Cache.array[i].buf = kmalloc(Cache.cache_item_size,
452 if (!Cache.array[i].buf)
454 memset(Cache.array[i].buf, 0, Cache.cache_item_size);
455 total_bytes += Cache.cache_item_size;
465 /* Malloc memory for data merging during Level2 Cache flush */
479 g_pTempBuf = kmalloc(Cache.cache_item_size, GFP_ATOMIC);
482 memset(g_pTempBuf, 0, Cache.cache_item_size);
483 total_bytes += Cache.cache_item_size;
723 kfree(Cache.array[i].buf);
765 kfree(Cache.array[i].buf);
807 Cache.pages_per_item = 1;
808 Cache.cache_item_size = 1 * DeviceInfo.wPageDataSize;
815 memcpy((void *)&cache_start_copy, (void *)&Cache,
827 /* Init the Level2 Cache data structure */
900 memcpy((void *)&Cache, (void *)&cache_start_copy,
929 memcpy((void *)&cache_start_copy, (void *)&Cache,
1103 addr = Cache.array[i].address;
1105 (page_addr < (addr + Cache.cache_item_size))) {
1132 if (Cache.array[i].use_cnt < bTempCount) {
1134 bTempCount = Cache.array[i].use_cnt;
1138 Cache.LRU = bCurrentLRU;
1154 start_addr = Cache.array[cache_item].buf;
1155 start_addr += (u32)(((logic_addr - Cache.array[cache_item].address) >>
1166 if (Cache.array[cache_item].use_cnt < MAX_WORD_VALUE)
1167 Cache.array[cache_item].use_cnt++;
1188 PageCount = Cache.pages_per_item;
1301 PageCount = Cache.pages_per_item;
1341 for (i = 0; i < DeviceInfo.wPagesPerBlock; i += Cache.pages_per_item) {
1387 /* Get blocks for Level2 Cache */
1399 "No enough free NAND blocks (n: %d) for L2 Cache!\n", n);
1404 /* Add the free block to the L2 Cache block array */
1534 /* Destroy the L2 Cache table and free the memory of all nodes */
1546 /* Init the Level2 Cache data structure */
1558 * Write back a changed victim cache item to the Level2 Cache
1559 * and update the L2 Cache table to map the change.
1560 * If the L2 Cache is full, then start to do the L2 Cache flush.
1575 * If Level2 Cache table is empty, then it means either:
1578 * 2. The Level2 Cache has just been flushed
1580 * So, 'steal' some free blocks from NAND for L2 Cache using
1600 /* Write the cache item data into the current position of L2 Cache */
1621 * Update the L2 Cache table.
1663 /* Increasing the current position pointer of the L2 Cache */
1668 /* The L2 Cache is full. Need to flush it now */
1670 "L2 Cache is full, will start to flush it\n");
1681 * Seach in the Level2 Cache table to find the cache item.
1682 * If find, read the data from the NAND page of L2 Cache,
1724 * Description: It writes the data in Cache Block
1735 addr = Cache.array[cache_blk].address;
1736 pDest = Cache.array[cache_blk].buf;
1739 Cache.array[cache_blk].changed = SET;
1744 Cache.array[cache_blk].address;
1746 Cache.array[cache_blk].changed;
1753 if (Cache.array[cache_blk].use_cnt < MAX_WORD_VALUE)
1754 Cache.array[cache_blk].use_cnt++;
1761 * Description: It writes least frequently used Cache block to flash if it
1774 bNO = Cache.LRU;
1778 if (Cache.array[bNO].changed != SET)
1781 nand_dbg_print(NAND_DBG_DEBUG, "FTL_Cache_Write: Cache"
1784 (u32)(Cache.array[bNO].address >>
1790 Cache.array[bNO].address;
1794 bResult = write_back_to_l2_cache(Cache.array[bNO].buf,
1795 Cache.array[bNO].address);
1797 Cache.array[bNO].changed = CLEAR;
1799 least_count = Cache.array[bNO].use_cnt;
1804 if (Cache.array[i].use_cnt > 0)
1805 Cache.array[i].use_cnt -= least_count;
1815 * Description: It reads the block from device in Cache Block
1817 * Mark the Cache Block as clean
1828 num = Cache.LRU; /* The LRU cache item will be overwritten */
1830 item_addr = (u64)GLOB_u64_Div(logical_addr, Cache.cache_item_size) *
1831 Cache.cache_item_size;
1832 Cache.array[num].address = item_addr;
1833 Cache.array[num].use_cnt = 1;
1834 Cache.array[num].changed = CLEAR;
1840 Cache.array[num].address;
1842 Cache.array[num].changed;
1846 * Search in L2 Cache. If hit, fill data into L1 Cache item buffer,
1849 ret = search_l2_cache(Cache.array[num].buf, logical_addr);
1850 if (PASS == ret) /* Hit in L2 Cache */
1858 return FTL_Cache_Read_All(Cache.array[num].buf, phy_addr);
3596 if (SET == Cache.array[i].changed) {
3601 Cache.array[i].address;
3605 ret = write_back_to_l2_cache(Cache.array[i].buf, Cache.array[i].address);
3607 Cache.array[i].changed = CLEAR;
3640 "GLOB_FTL_Page_Read: Cache not hit\n");
3644 cache_item = Cache.LRU;
3683 cache_blk = Cache.LRU;