Lines Matching refs:MAC
31 Ralink Wireless Chip MAC related definition & structures
45 /* the first 24-byte in TXD is called TXINFO and will be DMAed to MAC block through TXFIFO. */
46 /* MAC block use this TXINFO to control the transmission behavior of this frame. */
379 /* 4 MAC registers */
382 /* 4.1 MAC SYSTEM configuration registers (offset:0x1000) */
393 #define MAC_ADDR_DW0 0x1008 /* MAC ADDR DW0 */
394 #define MAC_ADDR_DW1 0x100c /* MAC ADDR DW1 */
396 /* MAC_CSR2: STA MAC register 0 */
400 u8 Byte0; /* MAC address byte 0 */
401 u8 Byte1; /* MAC address byte 1 */
402 u8 Byte2; /* MAC address byte 2 */
403 u8 Byte3; /* MAC address byte 3 */
409 /* MAC_CSR3: STA MAC register 1 */
413 u8 Byte4; /* MAC address byte 4 */
414 u8 Byte5; /* MAC address byte 5 */
421 #define MAC_BSSID_DW0 0x1010 /* MAC BSSID DW0 */
422 #define MAC_BSSID_DW1 0x1014 /* MAC BSSID DW1 */
449 u32 BBP_PAR_DUR:1; /* 0: 4 MAC clock cycles 1: 8 MAC clock cycles */
502 /* 4.2 MAC TIMING configuration registers (offset:0x1100) */
509 u32 OfdmXifsTime:4; /*OFDM SIFS. unit 1us. Applied after OFDM RX when MAC doesn't reference BBP signal BBRXEND */
550 /* 4.2 MAC POWER configuration registers (offset:0x1200) */
568 /* 4.3 MAC TX configuration registers (offset:0x1300) */
737 /* 4.4 MAC RX configuration registers (offset:0x1400) */
766 /* 4.5 MAC Security configuration (offset:0x1500) */
781 /* 4.7 MAC Statistis registers (offset:0x1700) */
1016 u8 MAC[6]; /* 0 for shared key table. 1 for pairwise key table */
1187 u8 Byte0; /* MAC address byte 0 */
1188 u8 Byte1; /* MAC address byte 1 */
1189 u8 Byte2; /* MAC address byte 2 */
1190 u8 Byte3; /* MAC address byte 3 */
1200 u8 Byte4; /* MAC address byte 4 */
1201 u8 Byte5; /* MAC address byte 5 */