Lines Matching refs:zfDelayWriteInternalReg
38 extern u16_t zfDelayWriteInternalReg(zdev_t* dev, u32_t addr, u32_t val);
86 #define reg_write(addr, val) zfDelayWriteInternalReg(dev, addr+0x1bc000, val)
215 //zfDelayWriteInternalReg(dev, 0x9800+0x1bc000, 0x10000007);
291 //zfDelayWriteInternalReg(dev, 0x9800+0x1bc000, 0x10000007);
751 zfDelayWriteInternalReg(dev, 0x1d4014, 0x5143);
755 zfDelayWriteInternalReg(dev, 0x1d4014, 0x5163);
1204 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC0_CW, 0x7f0007);
1205 //zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC1_AC0_AIFS, 0x1c04901c);
1256 zfDelayWriteInternalReg(dev, 0x1d4004, 0x800);
1263 zfDelayWriteInternalReg(dev, 0x1d4004, 0x400);
1270 zfDelayWriteInternalReg(dev, 0x1d4004, 0x0);
1406 zfDelayWriteInternalReg(dev, ZM_MAC_REG_ROLL_CALL_TBL_L, 0x00);
1407 zfDelayWriteInternalReg(dev, ZM_MAC_REG_ROLL_CALL_TBL_H, 0x00);
1603 zfDelayWriteInternalReg(dev, 0x1c3d30, 0x100);
1621 zfDelayWriteInternalReg(dev, ZM_MAC_REG_ACK_EXTENSION, 0x40); // 0x28 -> 0x2c 6522:yflee
1625 zfDelayWriteInternalReg(dev, ZM_MAC_REG_RETRY_MAX, 0); // 0x11111 => 0
1628 zfDelayWriteInternalReg(dev, ZM_MAC_REG_SNIFFER, 0x2000000);
1632 zfDelayWriteInternalReg(dev, ZM_MAC_REG_RX_THRESHOLD, 0xc4000);
1636 zfDelayWriteInternalReg(dev, ZM_MAC_REG_RX_THRESHOLD, 0xc1f80);
1638 zfDelayWriteInternalReg(dev, ZM_MAC_REG_RX_THRESHOLD, 0xc0f80);
1642 //zfDelayWriteInternalReg(dev, ZM_MAC_REG_DYNAMIC_SIFS_ACK, 0x10A);
1643 zfDelayWriteInternalReg(dev, ZM_MAC_REG_RX_PE_DELAY, 0x70);
1644 zfDelayWriteInternalReg(dev, ZM_MAC_REG_EIFS_AND_SIFS, 0xa144000);
1645 zfDelayWriteInternalReg(dev, ZM_MAC_REG_SLOT_TIME, 9<<10);
1648 zfDelayWriteInternalReg(dev, 0x1c3b2c, 0x19000000);
1651 zfDelayWriteInternalReg(dev, 0x1c3b38, 0x201);
1656 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_HT1, 0x8000170);
1659 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BACKOFF_PROTECT, 0x105);
1663 zfDelayWriteInternalReg(dev, 0x1c3b9c, 0x10000a);
1665 zfDelayWriteInternalReg(dev, 0x1c368c, 0x0500ffff);
1667 zfDelayWriteInternalReg(dev, 0x1c3c40, 0x1);
1670 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BASIC_RATE, 0x150f);
1671 zfDelayWriteInternalReg(dev, ZM_MAC_REG_MANDATORY_RATE, 0x150f);
1672 zfDelayWriteInternalReg(dev, ZM_MAC_REG_RTS_CTS_RATE, 0x10b01bb);
1675 zfDelayWriteInternalReg(dev, 0x1c3694, 0x4003C1E);/* bit 26~28 otus-AM */
1678 zfDelayWriteInternalReg(dev, 0x1d0100, 0x3);
1679 zfDelayWriteInternalReg(dev, 0x1d0104, 0x3);
1682 zfDelayWriteInternalReg(dev, 0x1c3600, 0x3);
1685 zfDelayWriteInternalReg(dev, 0x1c3c50, 0xffff);
1688 zfDelayWriteInternalReg(dev, 0x1c3680, 0xf00008);
1690 zfDelayWriteInternalReg(dev, 0x1c362c, 0x0);
1694 zfDelayWriteInternalReg(dev, 0x1e1110, 0x4);
1696 zfDelayWriteInternalReg(dev, 0x1e1114, 0x80);
1699 zfDelayWriteInternalReg(dev, 0x1D4008, 0x73);
1702 zfDelayWriteInternalReg(dev, 0x1c3d7c, 0x110011);
1708 zfDelayWriteInternalReg(dev, 0x1c3bb0, 0x4);
1711 zfDelayWriteInternalReg(dev, ZM_MAC_REG_TXOP_NOT_ENOUGH_INDICATION, 0x141E0F48);
1714 zfDelayWriteInternalReg(dev, 0x1c3678, 0x70);
1731 zfDelayWriteInternalReg(dev, ZM_MAC_REG_SNIFFER, 0x2000001);
1735 zfDelayWriteInternalReg(dev, ZM_MAC_REG_SNIFFER, 0x2000000);
1753 zfDelayWriteInternalReg(dev, 0x1c3700, 0x0f0000a1);
1754 zfDelayWriteInternalReg(dev, 0x1c3c40, 0x1);
1758 zfDelayWriteInternalReg(dev, 0x1c3700, 0x0f000002);
1759 zfDelayWriteInternalReg(dev, 0x1c3c40, 0x1);
1763 zfDelayWriteInternalReg(dev, 0x1c3700, 0x0f000000);
1764 zfDelayWriteInternalReg(dev, 0x1c3c40, 0x1);
1768 zfDelayWriteInternalReg(dev, 0x1c3700, 0x0f0000e0);
1769 zfDelayWriteInternalReg(dev, 0x1c3c40, 0x41); // for multiple ( > 2 ) stations IBSS network
1789 zfDelayWriteInternalReg(dev, 0x1c3618, address);
1792 zfDelayWriteInternalReg(dev, 0x1c361C, address);
1836 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC0_CW, cwminTbl[0]
1838 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC1_CW, cwminTbl[1]
1840 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC2_CW, cwminTbl[2]
1842 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC3_CW, cwminTbl[3]
1844 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC4_CW, cwminTbl[4]
1848 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC1_AC0_AIFS, aifsTbl[0]
1850 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC3_AC2_AIFS, (aifsTbl[0]>>8)
1854 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC1_AC0_TXOP, txopTbl[0]
1856 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC3_AC2_TXOP, txopTbl[2]
1877 zfDelayWriteInternalReg(dev, ZM_MAC_REG_ATIM_WINDOW, atimWin);
1884 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BASIC_RATE, bRateBasic
1894 zfDelayWriteInternalReg(dev, ZM_MAC_REG_RTS_CTS_RATE, rate);
1902 zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_L,
1904 zfDelayWriteInternalReg(dev, ZM_MAC_REG_MAC_ADDR_H, macAddr[2]);
1908 zfDelayWriteInternalReg(dev, ZM_MAC_REG_ACK_TABLE+((macAddrId-1)*8),
1910 zfDelayWriteInternalReg(dev, ZM_MAC_REG_ACK_TABLE+((macAddrId-1)*8)+4,
1947 zfDelayWriteInternalReg(dev, ZM_MAC_REG_GROUP_HASH_TBL_L,
1949 zfDelayWriteInternalReg(dev, ZM_MAC_REG_GROUP_HASH_TBL_H,
1963 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_CTRL, 0);
1965 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_ADDR, ZM_BEACON_BUFFER_ADDRESS);
1987 zfDelayWriteInternalReg(dev, ZM_MAC_REG_PRETBTT, (bcnInterval-6)<<16);
1990 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PERIOD, value);
2000 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PERIOD, 0);
2019 zfDelayWriteInternalReg(dev, 0x1d0104, state);
2263 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PERIOD, hpPriv->ibssBcnInterval-1);
2268 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PERIOD, hpPriv->ibssBcnInterval);
2279 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_ADDR, ZM_BEACON_BUFFER_ADDRESS);
2293 zfDelayWriteInternalReg(dev, 0x1c3b9c, 0x8000a);
2298 zfDelayWriteInternalReg(dev, 0x1c3b9c, hpPriv->aggPktNum);
2310 zfDelayWriteInternalReg(dev, 0x1c3698, 0x5144000);
2315 zfDelayWriteInternalReg(dev, 0x1c3698, 0xA144000);
2332 zfDelayWriteInternalReg(dev, ZM_MAC_REG_EIFS_AND_SIFS, 0x8144000);
2336 zfDelayWriteInternalReg(dev, ZM_MAC_REG_EIFS_AND_SIFS, 0xa144000);
2340 zfDelayWriteInternalReg(dev, ZM_MAC_REG_EIFS_AND_SIFS, 0xc144000);
2344 zfDelayWriteInternalReg(dev, ZM_MAC_REG_EIFS_AND_SIFS, 0xa144000);
2348 zfDelayWriteInternalReg(dev, ZM_MAC_REG_EIFS_AND_SIFS, 0xa144000);
2360 zfDelayWriteInternalReg(dev, 0x1c3698, 0xA144000);
2385 zfDelayWriteInternalReg(dev, 0x1c3694, ((ackTpc) << 20) | (0x1<<26));
2386 zfDelayWriteInternalReg(dev, 0x1c3bb4, ((ackTpc) << 5 ) | (0x1<<11) |
2399 zfDelayWriteInternalReg(dev, 0x1c3694, ((hpPriv->currentAckRtsTpc&0x3f) << 20) | (0x1<<26));
2400 zfDelayWriteInternalReg(dev, 0x1c3bb4, ((hpPriv->currentAckRtsTpc&0x3f) << 5 ) | (0x1<<11) |
2405 zfDelayWriteInternalReg(dev, 0x1c3694, ((hpPriv->currentAckRtsTpc&0x3f) << 20) | (0x5<<26));
2406 zfDelayWriteInternalReg(dev, 0x1c3bb4, ((hpPriv->currentAckRtsTpc&0x3f) << 5 ) | (0x5<<11) |
2432 //zfDelayWriteInternalReg(dev, 0x1c5964, 0x1220);
2433 //zfDelayWriteInternalReg(dev, 0x1c5960, 0x900);
2434 //zfDelayWriteInternalReg(dev, 0x1c6960, 0x900);
2435 //zfDelayWriteInternalReg(dev, 0x1c7960, 0x900);
2440 zfDelayWriteInternalReg(dev, 0x1c8960, 0x900);
2444 zfDelayWriteInternalReg(dev, 0x1c8960, 0x9b49);
2449 zfDelayWriteInternalReg(dev, 0x1c8960, 0x0900);
2466 //zfDelayWriteInternalReg(dev, 0x1c5964, 0x1120);
2467 //zfDelayWriteInternalReg(dev, 0x1c5960, 0x9b40);
2468 //zfDelayWriteInternalReg(dev, 0x1c6960, 0x9b40);
2469 //zfDelayWriteInternalReg(dev, 0x1c7960, 0x9b40);
2474 zfDelayWriteInternalReg(dev, 0x1c8960, 0x9b49);
2478 zfDelayWriteInternalReg(dev, 0x1c8960, 0x0900);
2483 zfDelayWriteInternalReg(dev, 0x1c8960, 0x9b40);
2494 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC1_AC0_TXOP, hpPriv->txop[3]);
2499 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC1_AC0_TXOP, hpPriv->txop[2]);
2504 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC0_CW, hpPriv->cwmin[1]+((u32_t)hpPriv->cwmax[1]<<16));
2514 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC0_CW, (hpPriv->cwmin[0]/2)+((u32_t)hpPriv->cwmax[0]<<16));
2518 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC0_CW, hpPriv->cwmin[0]+((u32_t)hpPriv->cwmax[0]<<16));
2525 //zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC0_CW, 58+((u32_t)hpPriv->cwmax[0]<<16));
2526 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC0_CW, hpPriv->cwmin[0]+((u32_t)hpPriv->cwmax[0]<<16));
2532 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC1_AC0_TXOP, hpPriv->txop[0]);
2537 zfDelayWriteInternalReg(dev, ZM_MAC_REG_AC1_AC0_TXOP, 0x30);
2573 //zfDelayWriteInternalReg(dev, 0x1D4008, 0x73);
2574 zfDelayWriteInternalReg(dev, ZM_MAC_REG_DYNAMIC_SIFS_ACK, 0x10A);
2579 //zfDelayWriteInternalReg(dev, 0x1D4008, 0x70);
2582 zfDelayWriteInternalReg(dev, ZM_MAC_REG_DYNAMIC_SIFS_ACK, 0x105);
2586 zfDelayWriteInternalReg(dev, ZM_MAC_REG_DYNAMIC_SIFS_ACK, 0x104);
2628 zfDelayWriteInternalReg(dev, ZM_USB_MODE_CTRL_REG, mode);
3824 zfDelayWriteInternalReg(dev, 0x1c3694, ((hpPriv->tPow2x2g[0]&0x3f) << 20) | (0x5<<26));
3825 zfDelayWriteInternalReg(dev, 0x1c3bb4, ((hpPriv->tPow2x2g[0]&0x3f) << 5 ) | (0x5<<11) |
3845 zfDelayWriteInternalReg(dev, 0x1c3694, ((hpPriv->tPow2x5g[0]&0x3f) << 20) | (0x1<<26));
3846 zfDelayWriteInternalReg(dev, 0x1c3bb4, ((hpPriv->tPow2x5g[0]&0x3f) << 5 ) | (0x1<<11) |
3853 zfDelayWriteInternalReg(dev, 0x1c3694, ((hpPriv->tPow2x5g[0]&0x3f) << 20) | (0x5<<26));
3854 zfDelayWriteInternalReg(dev, 0x1c3bb4, ((hpPriv->tPow2x5g[0]&0x3f) << 5 ) | (0x5<<11) |
3986 zfDelayWriteInternalReg(dev, ZM_MAC_REG_PRETBTT, 0);
3987 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PERIOD, 0);
3993 zfDelayWriteInternalReg(dev, ZM_MAC_REG_PRETBTT, (bcnInterval-6)<<16);
3994 zfDelayWriteInternalReg(dev, ZM_MAC_REG_BCN_PERIOD, bcnInterval);
4074 //zfDelayWriteInternalReg(dev, 0x1c3b9c, num);
4090 zfDelayWriteInternalReg(dev, 0x1c3ba0, value);
4121 zfDelayWriteInternalReg(dev, ZM_MAC_REG_SLOT_TIME, 20<<10);
4126 zfDelayWriteInternalReg(dev, ZM_MAC_REG_SLOT_TIME, 9<<10);
4132 zfDelayWriteInternalReg(dev, 0x1c6388, 0x0c000000);
4134 zfDelayWriteInternalReg(dev, 0x1c59ec, 0x0cc80caa);
4140 zfDelayWriteInternalReg(dev, 0x1c5918, 40);
4144 zfDelayWriteInternalReg(dev, 0x1c5918, 20);
4150 zfDelayWriteInternalReg(dev, 0x1c5850, 0xec08b4e2);
4151 zfDelayWriteInternalReg(dev, 0x1c585c, 0x313a5d5e);
4155 zfDelayWriteInternalReg(dev, 0x1c5850, 0xede8b4e0);
4156 zfDelayWriteInternalReg(dev, 0x1c585c, 0x3139605e);
4186 zfDelayWriteInternalReg(dev, 0x1c8960, 0x9b49);
4190 zfDelayWriteInternalReg(dev, 0x1c8960, 0x0900);
4195 zfDelayWriteInternalReg(dev, 0x1c8960, 0x9b40);
4202 zfDelayWriteInternalReg(dev, 0x1c3694, ((hpPriv->currentAckRtsTpc&0x3f) << 20) | (0x5<<26));
4203 zfDelayWriteInternalReg(dev, 0x1c3bb4, ((hpPriv->currentAckRtsTpc&0x3f) << 5 ) | (0x5<<11) |
4248 zfDelayWriteInternalReg(dev, 0x1c3b28, 0x33333);
4260 zfDelayWriteInternalReg(dev, 0x1c3b28, 0x00000);
4305 zfDelayWriteInternalReg(dev, 0x1c3678, value);
4336 zfDelayWriteInternalReg(dev, ZM_MAC_REG_ROLL_CALL_TBL_L, (u32_t)(hpPriv->camRollCallTable & 0xffffffff));
4337 zfDelayWriteInternalReg(dev, ZM_MAC_REG_ROLL_CALL_TBL_H, (u32_t)((hpPriv->camRollCallTable >> 32) & 0xffffffff));
4349 zfDelayWriteInternalReg(dev, ZM_MAC_REG_EIFS_AND_SIFS, reg_value);