Lines Matching refs:did
230 * Address for new work request loads (did<2:0> == 0)
239 /* the ID of POW -- did<2:0> == 0 in this case */
240 uint64_t did:8;
262 /* the ID of POW -- did<2:0> == 1 in this case */
263 uint64_t did:8;
297 /* the ID of POW -- did<2:0> == 2 in this case */
298 uint64_t did:8;
329 /* the ID of POW -- did<2:0> == 3 in this case */
330 uint64_t did:8;
372 * address for NULL_RD request (did<2:0> == 4) when this is read,
386 /* the ID of POW -- did<2:0> == 4 in this case */
387 uint64_t did:8;
945 * for POW stores (i.e. when did<7:3> == 0xc)
946 * - did<2:0> == 0 => pending switch bit is set
947 * - did<2:0> == 1 => no affect on the pending switch bit
948 * - did<2:0> == 3 => pending switch bit is cleared
949 * - did<2:0> == 7 => no affect on the pending switch bit
950 * - did<2:0> == others => must not be used
954 * NOTE: did<2:0> == 2 is used by the HW for a special single-cycle
956 * did<2:0> == 2.
970 uint64_t did:8;
992 uint64_t did:8;
1021 load_addr.sstatus.did = CVMX_OCT_DID_TAG_TAG1;
1047 load_addr.sstatus.did = CVMX_OCT_DID_TAG_TAG1;
1117 ptr.swork.did = CVMX_OCT_DID_TAG_SWTAG;
1171 ptr.snull_rd.did = CVMX_OCT_DID_TAG_NULL_RD;
1203 data.s.did = CVMX_OCT_DID_TAG_SWTAG;
1330 ptr.sio.did = CVMX_OCT_DID_TAG_SWTAG;
1446 ptr.sio.did = CVMX_OCT_DID_TAG_SWTAG;
1525 ptr.sio.did = CVMX_OCT_DID_TAG_TAG1;
1591 ptr.sio.did = CVMX_OCT_DID_TAG_TAG1;
1751 ptr.sio.did = CVMX_OCT_DID_TAG_TAG3;
1853 ptr.sio.did = CVMX_OCT_DID_TAG_TAG3;