Lines Matching refs:CVMX_ADD_IO_SEG
32 CVMX_ADD_IO_SEG(0x0001180050001080ull)
34 CVMX_ADD_IO_SEG(0x0001180050001088ull)
36 CVMX_ADD_IO_SEG(0x0001180050001100ull)
38 CVMX_ADD_IO_SEG(0x0001180050001108ull)
40 CVMX_ADD_IO_SEG(0x0001180050001150ull)
42 CVMX_ADD_IO_SEG(0x0001180050001158ull)
44 CVMX_ADD_IO_SEG(0x0001180050001160ull)
46 CVMX_ADD_IO_SEG(0x0001180050001168ull)
48 CVMX_ADD_IO_SEG(0x0001180050001170ull)
50 CVMX_ADD_IO_SEG(0x0001180050001110ull)
52 CVMX_ADD_IO_SEG(0x0001180050001118ull)
54 CVMX_ADD_IO_SEG(0x0001180050001120ull)
56 CVMX_ADD_IO_SEG(0x0001180050001128ull)
58 CVMX_ADD_IO_SEG(0x0001180050001130ull)
60 CVMX_ADD_IO_SEG(0x0001180050001138ull)
62 CVMX_ADD_IO_SEG(0x0001180050001140ull)
64 CVMX_ADD_IO_SEG(0x0001180050001148ull)
66 CVMX_ADD_IO_SEG(0x0001180050001010ull)
68 CVMX_ADD_IO_SEG(0x0001180050001018ull)
70 CVMX_ADD_IO_SEG(0x0001180050001020ull)
72 CVMX_ADD_IO_SEG(0x0001180050001028ull)
74 CVMX_ADD_IO_SEG(0x0001180050001000ull)
76 CVMX_ADD_IO_SEG(0x0001180050001008ull)
78 CVMX_ADD_IO_SEG(0x0001180050000080ull)
80 CVMX_ADD_IO_SEG(0x0001180050000010ull)
82 CVMX_ADD_IO_SEG(0x0001180050000028ull + (((offset) & 1) * 8))
84 CVMX_ADD_IO_SEG(0x0001180050000020ull)
86 CVMX_ADD_IO_SEG(0x0001180050000038ull + (((offset) & 1) * 8))
88 CVMX_ADD_IO_SEG(0x0001180050000098ull)
90 CVMX_ADD_IO_SEG(0x00011800500000A0ull)
92 CVMX_ADD_IO_SEG(0x00011800500000A8ull)
94 CVMX_ADD_IO_SEG(0x00011800500000B0ull)
96 CVMX_ADD_IO_SEG(0x0001180050000050ull)
98 CVMX_ADD_IO_SEG(0x0001180050000058ull)
100 CVMX_ADD_IO_SEG(0x0001180050000088ull)
102 CVMX_ADD_IO_SEG(0x0001180050000000ull)
104 CVMX_ADD_IO_SEG(0x0001180050000018ull)
106 CVMX_ADD_IO_SEG(0x0001180050000090ull)
108 CVMX_ADD_IO_SEG(0x0001180050000048ull)
110 CVMX_ADD_IO_SEG(0x0001180050000100ull)
112 CVMX_ADD_IO_SEG(0x0001180050000008ull)