Lines Matching defs:interface
47 void __cvmx_interrupt_gmxx_enable(int interface);
53 * @interface: Interface to probe
57 int __cvmx_helper_rgmii_probe(int interface)
61 mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
67 "SPI interface\n");
97 * Put an RGMII interface in loopback mode. Internal packets sent
105 int interface = (port >> 4) & 1;
114 cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 1);
115 cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);
116 cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0x2000);
117 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
118 tmp = cvmx_read_csr(CVMX_ASXX_PRT_LOOP(interface));
119 cvmx_write_csr(CVMX_ASXX_PRT_LOOP(interface), (1 << index) | tmp);
120 tmp = cvmx_read_csr(CVMX_ASXX_TX_PRT_EN(interface));
121 cvmx_write_csr(CVMX_ASXX_TX_PRT_EN(interface), (1 << index) | tmp);
122 tmp = cvmx_read_csr(CVMX_ASXX_RX_PRT_EN(interface));
123 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface), (1 << index) | tmp);
125 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
128 static int __cvmx_helper_errata_asx_pass1(int interface, int port,
133 cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 12);
135 cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 11);
137 cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 10);
139 cvmx_write_csr(CVMX_ASXX_TX_HI_WATERX(port, interface), 9);
148 * to get RGMII to function on the supplied interface.
150 * @interface: PKO Interface to configure (0 or 1)
154 int __cvmx_helper_rgmii_enable(int interface)
156 int num_ports = cvmx_helper_ports_on_interface(interface);
163 mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
175 cvmx_write_csr(CVMX_ASXX_TX_PRT_EN(interface), asx_tx.u64);
179 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface), asx_rx.u64);
187 __cvmx_helper_errata_asx_pass1(interface, port,
199 (port, interface));
202 cvmx_write_csr(CVMX_GMXX_RXX_FRM_CTL(port, interface),
213 cvmx_write_csr(CVMX_GMXX_TXX_PAUSE_PKT_TIME(port, interface),
216 (port, interface), 19000);
219 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, interface),
221 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, interface),
224 cvmx_write_csr(CVMX_ASXX_TX_CLK_SETX(port, interface),
226 cvmx_write_csr(CVMX_ASXX_RX_CLK_SETX(port, interface),
231 __cvmx_helper_setup_gmx(interface, num_ports);
237 (interface, port));
239 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(port, interface));
241 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(port, interface),
244 __cvmx_interrupt_asxx_enable(interface);
245 __cvmx_interrupt_gmxx_enable(interface);
262 int interface = cvmx_helper_get_interface_num(ipd_port);
266 asxx_prt_loop.u64 = cvmx_read_csr(CVMX_ASXX_PRT_LOOP(interface));
295 int interface = cvmx_helper_get_interface_num(ipd_port);
311 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
315 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface),
316 cvmx_read_csr(CVMX_ASXX_RX_PRT_EN(interface)) &
332 gmx_tx_ovr_bp.u64 = cvmx_read_csr(CVMX_GMXX_TX_OVR_BP(interface));
336 cvmx_write_csr(CVMX_GMXX_TX_OVR_BP(interface), gmx_tx_ovr_bp.u64);
337 cvmx_read_csr(CVMX_GMXX_TX_OVR_BP(interface));
347 interface * 0x800 + index * 0x100 + 0x880);
355 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), new_gmx_cfg.u64);
356 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
382 cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 50);
383 cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);
384 cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
386 cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 5);
387 cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x40);
388 cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0);
390 cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 1);
391 cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);
392 cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0x2000);
398 mode.u64 = cvmx_read_csr(CVMX_GMXX_INF_MODE(interface));
415 (index, interface), 1);
421 cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
424 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), new_gmx_cfg.u64);
427 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface),
428 cvmx_read_csr(CVMX_ASXX_RX_PRT_EN(interface)) | (1 <<
440 cvmx_write_csr(CVMX_GMXX_TX_OVR_BP(interface), gmx_tx_ovr_bp_save.u64);
444 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), new_gmx_cfg.u64);
465 int interface = cvmx_helper_get_interface_num(ipd_port);
472 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
481 cvmx_write_csr(CVMX_GMXX_TXX_CLK(index, interface), 1);
482 cvmx_write_csr(CVMX_GMXX_TXX_SLOT(index, interface), 0x200);
483 cvmx_write_csr(CVMX_GMXX_TXX_BURST(index, interface), 0x2000);
485 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
488 asxx_prt_loop.u64 = cvmx_read_csr(CVMX_ASXX_PRT_LOOP(interface));
497 cvmx_write_csr(CVMX_ASXX_PRT_LOOP(interface), asxx_prt_loop.u64);
502 tmp = cvmx_read_csr(CVMX_ASXX_TX_PRT_EN(interface));
503 cvmx_write_csr(CVMX_ASXX_TX_PRT_EN(interface),
505 tmp = cvmx_read_csr(CVMX_ASXX_RX_PRT_EN(interface));
506 cvmx_write_csr(CVMX_ASXX_RX_PRT_EN(interface),
513 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);