Lines Matching refs:MDP_BASE
43 outpdw(MDP_BASE + 0x001c, bits); /* MDP_SW_RESET */
45 while (inpdw(MDP_BASE + 0x001c) & bits) /* self clear when complete */
62 outpdw(MDP_BASE + 0x10004, bits); /* MDP_OVERLAY0_CFG */
64 outpdw(MDP_BASE + 0x18004, bits); /* MDP_OVERLAY1_CFG */
66 MSM_FB_INFO("mdp4_overlay_cfg: 0x%x\n", (int)inpdw(MDP_BASE + 0x10004));
73 bits = inpdw(MDP_BASE + 0x0038); /* MDP_DISP_INTF_SEL */
96 outpdw(MDP_BASE + 0x0038, bits); /* MDP_DISP_INTF_SEL */
98 MSM_FB_INFO("mdp4_display_intf_sel: 0x%x\n", (int)inpdw(MDP_BASE + 0x0038));
103 return inpdw(MDP_BASE + 0x0018) & 0x3ff; /* MDP_DISPLAY_STATUS */
111 outpdw(MDP_BASE + 0x0060, base);/* MDP_EBI2_LCD0 */
112 outpdw(MDP_BASE + 0x0068, ystride);/* MDP_EBI2_LCD0_YSTRIDE */
114 outpdw(MDP_BASE + 0x0064, base);/* MDP_EBI2_LCD1 */
115 outpdw(MDP_BASE + 0x006c, ystride);/* MDP_EBI2_LCD1_YSTRIDE */
134 outpdw(MDP_BASE + 0x0090, bits); /* MDP_MDDI_PARAM_WR_SEL */
192 outpdw(MDP_BASE + 0x0050, bits);/* enable specififed interrupts */
195 MDP_OUTP(MDP_BASE + 0x95010, 1); /* auto clear HIST */
198 outpdw(MDP_BASE + 0x9501c, INTR_HIST_DONE);
206 outpdw(MDP_BASE + 0x004c, 0x02222); /* 3 pending requests */
209 outpdw(MDP_BASE + 0x91004, 0x27); /* burst size of 8 */
226 bits = inpdw(MDP_BASE + 0xc0000);
230 outpdw(MDP_BASE + 0xc0004, 0); /* vsync ctrl out */
231 outpdw(MDP_BASE + 0xc0008, 0); /* vsync period */
232 outpdw(MDP_BASE + 0xc000c, 0); /* vsync pusle width */
233 outpdw(MDP_BASE + 0xc0010, 0); /* lcdc display HCTL */
234 outpdw(MDP_BASE + 0xc0014, 0); /* lcdc display v start */
235 outpdw(MDP_BASE + 0xc0018, 0); /* lcdc display v end */
236 outpdw(MDP_BASE + 0xc001c, 0); /* lcdc active hctl */
237 outpdw(MDP_BASE + 0xc0020, 0); /* lcdc active v start */
238 outpdw(MDP_BASE + 0xc0024, 0); /* lcdc active v end */
239 outpdw(MDP_BASE + 0xc0028, 0); /* lcdc board color */
240 outpdw(MDP_BASE + 0xc002c, 0); /* lcdc underflow ctrl */
241 outpdw(MDP_BASE + 0xc0030, 0); /* lcdc hsync skew */
242 outpdw(MDP_BASE + 0xc0034, 0); /* lcdc test ctl */
243 outpdw(MDP_BASE + 0xc0038, 0); /* lcdc ctl polarity */
275 lcdc = inpdw(MDP_BASE + 0xc0000);
311 lcdc = inpdw(MDP_BASE + 0xc0000);
344 memcpy(mdp_hist.r, MDP_BASE + 0x95100,
347 memcpy(mdp_hist.g, MDP_BASE + 0x95200,
350 memcpy(mdp_hist.b, MDP_BASE + 0x95300,
901 off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff +
908 off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff +
915 off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff +
930 overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */
932 overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */
976 off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff +
990 off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff +
1004 off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff +
1018 off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff +
1033 off = (uint32 *)(MDP_BASE + MDP4_VIDEO_BASE + voff +
1565 base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */
1567 base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */
1622 base = MDP_BASE + MDP4_VIDEO_BASE + voff + 0x5000;
1676 base = MDP_BASE + MDP4_RGB_BASE + voff + 0x5000;