• Home
  • History
  • Annotate
  • Raw
  • Download
  • only in /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/msm/

Lines Matching refs:DISP_WRITE_OUT

71 #define DISP_WRITE_OUT(addr, data) \
77 DISP_WRITE_OUT(##addr, (register_##addr & ~(bitmask)) | (data));
87 DISP_WRITE_OUT(DISP_HORZ_RAM_ADDR_POS_1_ADDR, (ulhc_col) + tmd20qvga_panel_offset); \
88 DISP_WRITE_OUT(DISP_HORZ_RAM_ADDR_POS_2_ADDR, (lrhc_col) + tmd20qvga_panel_offset); \
89 DISP_WRITE_OUT(DISP_VERT_RAM_ADDR_POS_1_ADDR, (ulhc_row)); \
90 DISP_WRITE_OUT(DISP_VERT_RAM_ADDR_POS_2_ADDR, (lrhc_row)); \
91 DISP_WRITE_OUT(DISP_RAM_ADDR_SET_1_ADDR, (ulhc_col) + tmd20qvga_panel_offset); \
92 DISP_WRITE_OUT(DISP_RAM_ADDR_SET_2_ADDR, (ulhc_row)); \
782 DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_1_ADDR,
801 DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_2_ADDR,
820 DISP_WRITE_OUT(DISP_POFF_LN_SETTING_ADDR, 0x000A);
821 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xFFEE);
823 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xF812);
825 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xE811);
827 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xC011);
829 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x4011);
831 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0010);
834 DISP_WRITE_OUT(DISP_POFF_LN_SETTING_ADDR, 0x000F);
835 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0BFE);
836 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100);
838 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0BED);
839 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100);
841 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x00CD);
842 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100);
844 DISP_WRITE_OUT(DISP_START_OSCILLATION_ADDR, 0x0);
847 DISP_WRITE_OUT(DISP_MODE_SETTING_ADDR, 0x0004);
848 DISP_WRITE_OUT(DISP_MODE_SETTING_ADDR, 0x0000);
872 DISP_WRITE_OUT(DISP_MODE_SETTING_ADDR, 0x0005);
876 DISP_WRITE_OUT(DISP_START_OSCILLATION_ADDR, 0x0001);
877 DISP_WRITE_OUT(DISP_DRIVER_OUTPUT_CTL_ADDR, 0x0127);
878 DISP_WRITE_OUT(DISP_LCD_DRIVING_SIG_ADDR, 0x200);
880 DISP_WRITE_OUT(DISP_ENTRY_MODE_ADDR, 0x0130);
882 DISP_WRITE_OUT(DISP_TMD_700_ADDR, 0x0003);
887 DISP_WRITE_OUT(DISP_DISPLAY_CTL_1_ADDR, 0x0000);
890 DISP_WRITE_OUT(DISP_DISPLAY_CTL_1_ADDR, 0x4000);
892 DISP_WRITE_OUT(DISP_DISPLAY_CTL_2_ADDR, 0x0302);
896 DISP_WRITE_OUT(DISP_DISPLAY_CTL_1_ADDR, 0x0004);
899 DISP_WRITE_OUT(DISP_DISPLAY_CTL_1_ADDR, 0x4004);
901 DISP_WRITE_OUT(DISP_DISPLAY_CTL_2_ADDR, 0x020E);
905 DISP_WRITE_OUT(DISP_EXT_DISPLAY_CTL_1_ADDR, 0x0000);
906 DISP_WRITE_OUT(DISP_FRAME_CYCLE_CTL_ADDR, 0x0010);
907 DISP_WRITE_OUT(DISP_LTPS_CTL_1_ADDR, 0x0302);
908 DISP_WRITE_OUT(DISP_LTPS_CTL_2_ADDR, 0x0102);
909 DISP_WRITE_OUT(DISP_LTPS_CTL_3_ADDR, 0x0000);
910 DISP_WRITE_OUT(DISP_TMD_015_ADDR, 0x2000);
912 DISP_WRITE_OUT(DISP_AMP_SETTING_ADDR, 0x0000);
913 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_1_ADDR, 0x0403);
914 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_2_ADDR, 0x0304);
915 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_3_ADDR, 0x0403);
916 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_4_ADDR, 0x0303);
917 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_5_ADDR, 0x0101);
918 DISP_WRITE_OUT(DISP_TMD_305_ADDR, 0);
920 DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_1_ADDR, 0x0000);
921 DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_2_ADDR, 0x013F);
923 DISP_WRITE_OUT(DISP_POWER_CTL_3_ADDR, 0x077D);
925 DISP_WRITE_OUT(DISP_POWER_CTL_4_ADDR, 0x0005);
926 DISP_WRITE_OUT(DISP_POWER_CTL_5_ADDR, 0x0000);
927 DISP_WRITE_OUT(DISP_POWER_CTL_6_ADDR, 0x0015);
928 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xC010);
931 DISP_WRITE_OUT(DISP_POWER_CTL_2_ADDR, 0x0001);
932 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0xFFFE);
935 DISP_WRITE_OUT(DISP_EXT_DISPLAY_CTL_1_ADDR, 0x0001);
936 DISP_WRITE_OUT(DISP_FRAME_CYCLE_CTL_ADDR, 0x0010);
937 DISP_WRITE_OUT(DISP_LTPS_CTL_1_ADDR, 0x0301);
938 DISP_WRITE_OUT(DISP_LTPS_CTL_2_ADDR, 0x0001);
939 DISP_WRITE_OUT(DISP_LTPS_CTL_3_ADDR, 0x0000);
940 DISP_WRITE_OUT(DISP_AMP_SETTING_ADDR, 0x0000);
941 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_1_ADDR, 0x0507);
942 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_2_ADDR, 0x0405);
943 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_3_ADDR, 0x0607);
944 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_4_ADDR, 0x0502);
945 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_5_ADDR, 0x0301);
946 DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_1_ADDR, 0x0000);
947 DISP_WRITE_OUT(DISP_SCREEN_1_DRV_POS_2_ADDR, 0x013F);
948 DISP_WRITE_OUT(DISP_POWER_CTL_3_ADDR, 0x0795);
950 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0102);
953 DISP_WRITE_OUT(DISP_POWER_CTL_4_ADDR, 0x0450);
954 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0103);
957 DISP_WRITE_OUT(DISP_POWER_CTL_5_ADDR, 0x0008);
958 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0104);
961 DISP_WRITE_OUT(DISP_POWER_CTL_6_ADDR, 0x0C00);
962 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0105);
965 DISP_WRITE_OUT(DISP_POWER_CTL_7_ADDR, 0x0000);
966 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0106);
969 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0801);
970 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100);
973 DISP_WRITE_OUT(DISP_POWER_CTL_2_ADDR, 0x001F);
974 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0101);
977 DISP_WRITE_OUT(DISP_POWER_CTL_2_ADDR, 0x009F);
978 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0101);
981 DISP_WRITE_OUT(DISP_HORZ_RAM_ADDR_POS_1_ADDR, 0x0010);
982 DISP_WRITE_OUT(DISP_HORZ_RAM_ADDR_POS_2_ADDR, 0x00FF);
983 DISP_WRITE_OUT(DISP_VERT_RAM_ADDR_POS_1_ADDR, 0x0000);
984 DISP_WRITE_OUT(DISP_VERT_RAM_ADDR_POS_2_ADDR, 0x013F);
986 DISP_WRITE_OUT(DISP_RAM_ADDR_SET_1_ADDR, 0x0010);
987 DISP_WRITE_OUT(DISP_RAM_ADDR_SET_2_ADDR, 0x0000);
992 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0881);
993 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100);
996 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0BE1);
997 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100);
1000 DISP_WRITE_OUT(DISP_POWER_CTL_1_ADDR, 0x0BFF);
1001 DISP_WRITE_OUT(DISP_POWER_SUPPLY_INTF_ADDR, 0x0100);
1013 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_1_ADDR, 0x0403);
1014 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_2_ADDR, 0x0302);
1015 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_3_ADDR, 0x0403);
1016 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_4_ADDR, 0x0303);
1017 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_5_ADDR, 0x0F07);
1022 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_1_ADDR, 0x0403);
1024 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_2_ADDR,
1032 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_3_ADDR,
1040 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_4_ADDR, 0x0303);
1041 DISP_WRITE_OUT(DISP_GAMMA_CONTROL_5_ADDR, 0x0F07);